James Zern [Fri, 1 Oct 2021 20:46:02 +0000 (13:46 -0700)]
{vp8,vp9}_set_roi_map: fix validation with INT_MIN
previously ranges were checked with abs() whose behavior is undefined
with INT_MIN. this fixes a crash when the original value is returned and
it later used as and offset into a table.
Define VPX_NO_RETURN as __declspec(noreturn) for MSVC. See
https://docs.microsoft.com/en-us/cpp/cpp/noreturn?view=msvc-160
This requires moving VPX_NO_RETURN before function declarations because
__declspec(noreturn) must be placed there. Fortunately GCC's
__attribute__((noreturn)) can be placed either before or after function
declarations.
Yunqing Wang [Fri, 23 Jul 2021 17:55:10 +0000 (10:55 -0700)]
Disable allow_partition_search_skip feature
This feature was added to help speed up still images and slideshows.
It didn't work anymore, and thus was disabled. Code cleanup will
follow.
This had negligible impact to regular test sets. Borg test result
on ugc360p set at speed 3.
avg_psnr: ovr_psnr: ssim: speed:
-0.244 -0.278 -0.153 -0.973
target_bandwidth is int64_t, but layer_target_bitrate[0] is an int. this
is safe in the only place it's set because target_bandwidth defaults to
1000. target_bandwidth is later used to populate the cpi's target, which
is an unsigned int so there may be further fixes/cleanups that can be
done.
Jorge E. Moreira [Wed, 30 Jun 2021 18:33:51 +0000 (11:33 -0700)]
Avoid overflow in calc_iframe_target_size
The changed product was observed to attempt to multiply 1800 by 2500000,
which overflows unsigned 32 bits. Converting to unsigned 64 bits first
and testing whether the final result fits in 32 bits solves the problem.
Cheng Chen [Thu, 17 Jun 2021 22:36:18 +0000 (15:36 -0700)]
Disallow skipping transform and quantization
The encoder has a feature to skip transform and quantization based
on model rd analysis. It could happen that the model
based analysis lets the encoder skips transform and quantization, while
a bad prediction occurs, leading to bad reconstructed blocks, which
are intrusive and apparently coding errors.
We add a speed feature to guard the skipping feature.
Due to the risk of bad perceptual quality, we disallow such skipping
by default.
On hdres test set, speed 2, the coding performance difference is 0.025%,
speed difference is 1.2%, which can be considered non significant.
Marco Paniconi [Fri, 25 Jun 2021 06:34:36 +0000 (23:34 -0700)]
vp9-rtc: Extract content dependency in cyclic refresh
For usage in the external RC. When content_mode = 0,
the cyclic refresh has no dependency on the content
(motion, spatial variance, motion vectors, etc,).
The content_mode = 0, when compared to content_mode = 1,
on rtc set for speed 7: has some regression on some
clips (~3-5%), but overall/average bdrate loss is
about ~1-2%.
Comparing aq_mode=3 with content_mode = 0, vs aq_mode=3:
about ~14% avg/overall bdrate gain, but has ~3-7% regression
on some hard motion clip (e.g.m street).
James Zern [Fri, 18 Jun 2021 18:56:27 +0000 (11:56 -0700)]
normalize vp9_calc_[ip]frame declarations and definitions
fixes warnings under visual studio:
vp9\encoder\vp9_ratectrl.c(2012): warning C4028: formal parameter 1
different from declaration
vp9\encoder\vp9_ratectrl.c(2027): warning C4028: formal parameter 1
different from declaration
Cheng Chen [Thu, 27 May 2021 22:38:28 +0000 (15:38 -0700)]
L2E: properly init two pass rc parameters
Two pass rc parameters are only initialized in the second pass
in vp9 normal two pass encoding.
However, the simple_encode API queries the keyframe group, arf group,
and number of coding frames without going throught the two pass
route.
Since recent libvpx rc changes, parameters in the TWO_PASS
struct have a great influence on the determination of the above
information.
We therefore need to properly init two pass rc parameters in
the simple_encode related environment.
James Zern [Tue, 25 May 2021 03:00:47 +0000 (03:00 +0000)]
Merge changes I2e86b005,I971c6261,I87fe4dad
* changes:
Use 'ptrdiff_t' instead of 'int' for pointer offset parameters
Implement vpx_convolve8_avg_vert_neon using SDOT instruction
Merge transpose and permute in Neon SDOT vertical convolution
Jonathan Wright [Mon, 24 May 2021 10:42:09 +0000 (11:42 +0100)]
Use 'ptrdiff_t' instead of 'int' for pointer offset parameters
A number of the load/store functions in mem_neon.h use type 'int' for
the 'stride' pointer offset parameter. This causes Clang to generate
the following warning every time these functions are called with a
wider type passed in for 'stride':
warning: implicit conversion loses integer precision: 'ptrdiff_t'
(aka 'long') to 'int' [-Wshorten-64-to-32]
This patch changes all such instances of 'int' to 'ptrdiff_t'.
Jonathan Wright [Sun, 23 May 2021 12:35:15 +0000 (13:35 +0100)]
Implement vpx_convolve8_avg_vert_neon using SDOT instruction
Add an alternative AArch64 implementation of
vpx_convolve8_avg_vert_neon for targets that implement the Armv8.4-A
SDOT (signed dot product) instruction.
The existing MLA-based implementation of vpx_convolve8_avg_vert_neon
is retained and used on target CPUs that do not implement the SDOT
instruction (or CPUs executing in AArch32 mode). The availability of
the SDOT instruction is indicated by the feature macro
__ARM_FEATURE_DOTPROD.
Jonathan Wright [Sat, 22 May 2021 21:07:25 +0000 (22:07 +0100)]
Merge transpose and permute in Neon SDOT vertical convolution
The original dot-product implementation of vpx_convolve8_vert_neon
used a separate transpose before and after the convolution operation.
This patch merges the first transpose with the TBL permute (necessary
before using SDOT to compute the convolution) to significantly reduce
the amount of data re-arrangement. This new approach also allows for
more effective data re-use between loop iterations.
Co-authored by: James Greenhalgh <james.greenhalgh@arm.com>
Jonathan Wright [Mon, 17 May 2021 09:53:07 +0000 (10:53 +0100)]
Implement vpx_convolve8_avg_horiz_neon using SDOT instruction
Add an alternative AArch64 implementation of
vpx_convolve8_avg_horiz_neon for targets that implement the Armv8.4-A
SDOT (signed dot product) instruction.
The existing MLA-based implementation of vpx_convolve8_avg_horiz_neon
is retained and used on target CPUs that do not implement the SDOT
instruction (or CPUs executing in AArch32 mode). The availability of
the SDOT instruction is indicated by the feature macro
__ARM_FEATURE_DOTPROD.
Jonathan Wright [Wed, 12 May 2021 15:05:56 +0000 (16:05 +0100)]
Optimize remaining mse and sse functions in variance_neon.c
Implement sum of squared difference calculations in vpx_mse16x16_neon
and vpx_get4x4sse_cs_neon using the ABD and UDOT instructions -
instead of widening subtracts followed by a sequence of MLAs.
The existing implementation is retained for use on CPUs that do not
implement the Armv8.4-A UDOT instruction. This commit also updates
the variable names used in the existing implementations to be more
descriptive.
Jonathan Wright [Tue, 20 Apr 2021 11:03:56 +0000 (12:03 +0100)]
Implement vertical convolution using Neon SDOT instruction
Add an alternative AArch64 implementation of vpx_convolve8_vert_neon
for targets that implement the Armv8.4-A SDOT (signed dot product)
instruction.
The existing MLA-based implementation of vpx_convolve8_vert_neon is
retained and used on target CPUs that do not implement the SDOT
instruction (or CPUs executing in AArch32 mode). The availability of
the SDOT instruction is indicated by the feature macro
__ARM_FEATURE_DOTPROD.
Jonathan Wright [Mon, 10 May 2021 11:22:03 +0000 (12:22 +0100)]
Use ABD and UDOT to implement Neon sad_4d functions
Implementing sad16_neon using ABD, UDOT instead of ABAL, ABAL2 saves
a cycle and removes resource contention for a single SIMD pipe on
modern out-of-order Arm CPUs. The UDOT accumulation into 32-bit
elements also allows for a faster reduction at the end of each SAD
function.
The existing implementation is retained for CPUs that do not
implement the Armv8.4-A UDOT instruction, and CPUs executing in
AArch32 mode.
Jonathan Wright [Fri, 7 May 2021 12:25:51 +0000 (13:25 +0100)]
Optimize Neon reductions in sum_neon.h using ADDV instruction
Use the AArch64-only ADDV and ADDLV instructions to accelerate
reductions that add across a Neon vector in sum_neon.h. This commit
also refactors the inline functions to return a scalar instead of a
vector - allowing for optimization of the surrounding code at each
call site.
James Zern [Sat, 8 May 2021 02:35:25 +0000 (19:35 -0700)]
img_alloc_helper: make align var unsigned
quiets an integer sanitizer warning:
vpx/src/vpx_image.c:101:25: runtime error: implicit conversion from
type 'int' of value -2 (32-bit, signed) to type 'unsigned int' changed
the value to 4294967294 (32-bit, unsigned)
Jonathan Wright [Thu, 6 May 2021 13:51:05 +0000 (14:51 +0100)]
Optimize Neon SAD reductions using wider ADDP instruction
Implement AArch64-only paths for each of the Neon SAD reduction
functions, making use of a wider pairwise addition instruction only
available on AArch64.
This change removes the need for shuffling between high and low
halves of Neon vectors - resulting in a faster reduction that requires
fewer instructions.
Jonathan Wright [Sun, 11 Apr 2021 14:20:36 +0000 (15:20 +0100)]
Implement horizontal convolution using Neon SDOT instruction
Add an alternative AArch64 implementation of vpx_convolve8_horiz_neon
for targets that implement the Armv8.4-A SDOT (signed dot product)
instruction.
The existing MLA-based implementation of vpx_convolve8_horiz_neon is
retained and used on target CPUs that do not implement the SDOT
instruction (or CPUs executing in AArch32 mode). The availability of
the SDOT instruction is indicated by the feature macro
__ARM_FEATURE_DOTPROD.
Co-authored by: James Greenhalgh <james.greenhalgh@arm.com>
James Zern [Tue, 4 May 2021 19:10:21 +0000 (12:10 -0700)]
test.mk: enable vp9_denoiser_test w/NEON
this file uses GTEST_ALLOW_UNINSTANTIATED_PARAMETERIZED_TEST so it's
safe to enable unconditionally. the filter check fell out of sync with
the code, there's a sse2 and neon implementation for the filter.
James Zern [Wed, 28 Apr 2021 17:30:48 +0000 (17:30 +0000)]
Merge changes Iebe9842f,I174b67a5,I80ed1a16
* changes:
vpx_convolve_neon: prefer != 0 to > 0 in tests
vpx_convolve_avg_neon: prefer != 0 to > 0 in tests
vpx_convolve_copy_neon: prefer != 0 to > 0 in tests
James Zern [Wed, 28 Apr 2021 01:02:35 +0000 (18:02 -0700)]
vpx_convolve_neon: prefer != 0 to > 0 in tests
this produces better assembly code; the horizontal convolve is called
with an adjusted intermediate_height where it may over process some rows
so the checks in those functions remain.
Paul Wilkins [Tue, 20 Apr 2021 16:26:22 +0000 (17:26 +0100)]
Further normalization of Vizier parameters.
Further changes to normalize the Vizier command line parameters.
The intent is that the default behavior for any given parameter
is signaled by the value 1.0 (expressed on the command line as a
rational).
The final values used in the two pass code are obtained by multiplying
the passed in factors by a default values if use_vizier_rc_params is 1.
Where use_vizier_rc_params is 0 the values are explicitly set to
the defaults.
This patch also changes the default value of each parameter to 1.0
even if not set explicitly. This should ensure safe /default behavior
if the user sets use_vizier_rc_params to 1 but does not set all the
the individual parameters.
Add command line options for three rd parameters.
They are controlled by --use_vizier_rc_params, together with
other rc parameters.
If not set from command line, current default values will be used.
If pass --use-vizier-rc-params=1, the rc parameters are overwittern
by pass in values. It --use-vizier-rc-params=0, the rc parameters
remain the default values.
A recent change leads to slight difference of encoding results: d3aaac367 Change calculation of rd multiplier,
which is caught by Jenkins nightly test.
Paul Wilkins [Tue, 6 Apr 2021 19:05:48 +0000 (20:05 +0100)]
Change zm_factor for Vizier.
Changes the exposed zm_factor parameter.
This patch alters the meaning of the zm_factor
parameter that will be exposed for the Vizier project.
The previous power factor was hard to interpret in terms
of its meaning and effect and has been replaced by a linear factor.
Given that the initial Vizier results suggested a lower zero motion
effect for all formats, the default impact has been reduced.
The patch as it stands gives a modest improvement for PSNR
but is slightly down on some sets for SSIM
(overall psnr, ssim % bdrate change: -ve is better)
projects / libvpx / log