From fce74874d2d2251720b6a9c4a502f0ee03fb9514 Mon Sep 17 00:00:00 2001
From: Cameron McInally <cameron.mcinally@nyu.edu>
Date: Thu, 13 Jun 2019 19:25:12 +0000
Subject: [PATCH] Revert "[NFC][CodeGen] Add unary fneg tests to
 fmul-combines.ll fnabs.ll"

This reverts commit 5c0114058126757ce21e546997121afffc8119cd.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363316 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/X86/fmul-combines.ll | 66 -------------------------------
 test/CodeGen/X86/fnabs.ll         | 63 -----------------------------
 2 files changed, 129 deletions(-)

diff --git a/test/CodeGen/X86/fmul-combines.ll b/test/CodeGen/X86/fmul-combines.ll
index e7ac5c7bcdd..f9843dced1b 100644
--- a/test/CodeGen/X86/fmul-combines.ll
+++ b/test/CodeGen/X86/fmul-combines.ll
@@ -251,39 +251,6 @@ define float @fmul_fneg_fneg_f32(float %x, float %y) {
   ret float %mul
 }
 
-define float @fmul_unary_fneg_unary_fneg_f32(float %x, float %y) {
-; CHECK-LABEL: fmul_unary_fneg_unary_fneg_f32:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    mulss %xmm1, %xmm0
-; CHECK-NEXT:    retq
-  %x.neg = fneg float %x
-  %y.neg = fneg float %y
-  %mul = fmul float %x.neg, %y.neg
-  ret float %mul
-}
-
-define float @fmul_unary_fneg_fneg_f32(float %x, float %y) {
-; CHECK-LABEL: fmul_unary_fneg_fneg_f32:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    mulss %xmm1, %xmm0
-; CHECK-NEXT:    retq
-  %x.neg = fneg float %x
-  %y.neg = fsub float -0.0, %y
-  %mul = fmul float %x.neg, %y.neg
-  ret float %mul
-}
-
-define float @fmul_fneg_unary_fneg_f32(float %x, float %y) {
-; CHECK-LABEL: fmul_fneg_unary_fneg_f32:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    mulss %xmm1, %xmm0
-; CHECK-NEXT:    retq
-  %x.neg = fsub float -0.0, %x
-  %y.neg = fneg float %y
-  %mul = fmul float %x.neg, %y.neg
-  ret float %mul
-}
-
 define <4 x float> @fmul_fneg_fneg_v4f32(<4 x float> %x, <4 x float> %y) {
 ; CHECK-LABEL: fmul_fneg_fneg_v4f32:
 ; CHECK:       # %bb.0:
@@ -295,37 +262,4 @@ define <4 x float> @fmul_fneg_fneg_v4f32(<4 x float> %x, <4 x float> %y) {
   ret <4 x float> %mul
 }
 
-define <4 x float> @fmul_unary_fneg_unary_fneg_v4f32(<4 x float> %x, <4 x float> %y) {
-; CHECK-LABEL: fmul_unary_fneg_unary_fneg_v4f32:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    mulps %xmm1, %xmm0
-; CHECK-NEXT:    retq
-  %x.neg = fneg <4 x float> %x
-  %y.neg = fneg <4 x float> %y
-  %mul = fmul <4 x float> %x.neg, %y.neg
-  ret <4 x float> %mul
-}
-
-define <4 x float> @fmul_unary_fneg_fneg_v4f32(<4 x float> %x, <4 x float> %y) {
-; CHECK-LABEL: fmul_unary_fneg_fneg_v4f32:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    mulps %xmm1, %xmm0
-; CHECK-NEXT:    retq
-  %x.neg = fneg <4 x float> %x
-  %y.neg = fsub <4 x float> <float -0.0, float -0.0, float -0.0, float -0.0>, %y
-  %mul = fmul <4 x float> %x.neg, %y.neg
-  ret <4 x float> %mul
-}
-
-define <4 x float> @fmul_fneg_unary_fneg_v4f32(<4 x float> %x, <4 x float> %y) {
-; CHECK-LABEL: fmul_fneg_unary_fneg_v4f32:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    mulps %xmm1, %xmm0
-; CHECK-NEXT:    retq
-  %x.neg = fsub <4 x float> <float -0.0, float -0.0, float -0.0, float -0.0>, %x
-  %y.neg = fneg <4 x float> %y
-  %mul = fmul <4 x float> %x.neg, %y.neg
-  ret <4 x float> %mul
-}
-
 attributes #0 = { "less-precise-fpmad"="true" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "unsafe-fp-math"="true" }
diff --git a/test/CodeGen/X86/fnabs.ll b/test/CodeGen/X86/fnabs.ll
index 424562bfe1f..a3ddfb970dc 100644
--- a/test/CodeGen/X86/fnabs.ll
+++ b/test/CodeGen/X86/fnabs.ll
@@ -14,15 +14,6 @@ define float @scalar_no_abs(float %a) {
   ret float %fsub
 }
 
-define float @scalar_no_abs_unary_fneg(float %a) {
-; CHECK-LABEL: scalar_no_abs_unary_fneg:
-; CHECK: vorps
-; CHECK-NEXT: retq
-  %fabs = tail call float @fabsf(float %a) #1
-  %fsub = fneg float %fabs
-  ret float %fsub
-}
-
 define float @scalar_uses_abs(float %a) {
 ; CHECK-LABEL: scalar_uses_abs:
 ; CHECK-DAG: vandps
@@ -35,18 +26,6 @@ define float @scalar_uses_abs(float %a) {
   ret float %fmul
 }
 
-define float @scalar_uses_abs_unary_fneg(float %a) {
-; CHECK-LABEL: scalar_uses_abs_unary_fneg:
-; CHECK-DAG: vandps
-; CHECK-DAG: vorps
-; CHECK: vmulss
-; CHECK-NEXT: retq
-  %fabs = tail call float @fabsf(float %a) #1
-  %fsub = fneg float %fabs
-  %fmul = fmul float %fsub, %fabs
-  ret float %fmul
-}
-
 define <4 x float> @vector128_no_abs(<4 x float> %a) {
 ; CHECK-LABEL: vector128_no_abs:
 ; CHECK: vorps
@@ -56,15 +35,6 @@ define <4 x float> @vector128_no_abs(<4 x float> %a) {
   ret <4 x float> %fsub
 }
 
-define <4 x float> @vector128_no_abs_unary_fneg(<4 x float> %a) {
-; CHECK-LABEL: vector128_no_abs_unary_fneg:
-; CHECK: vorps
-; CHECK-NEXT: retq
-  %fabs = tail call <4 x float> @llvm.fabs.v4f32(< 4 x float> %a) #1
-  %fsub = fneg <4 x float> %fabs
-  ret <4 x float> %fsub
-}
-
 define <4 x float> @vector128_uses_abs(<4 x float> %a) {
 ; CHECK-LABEL: vector128_uses_abs:
 ; CHECK-DAG: vandps
@@ -77,18 +47,6 @@ define <4 x float> @vector128_uses_abs(<4 x float> %a) {
   ret <4 x float> %fmul
 }
 
-define <4 x float> @vector128_uses_abs_unary_fneg(<4 x float> %a) {
-; CHECK-LABEL: vector128_uses_abs_unary_fneg:
-; CHECK-DAG: vandps
-; CHECK-DAG: vorps
-; CHECK: vmulps
-; CHECK-NEXT: retq
-  %fabs = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> %a) #1
-  %fsub = fneg <4 x float> %fabs
-  %fmul = fmul <4 x float> %fsub, %fabs
-  ret <4 x float> %fmul
-}
-
 define <8 x float> @vector256_no_abs(<8 x float> %a) {
 ; CHECK-LABEL: vector256_no_abs:
 ; CHECK: vorps
@@ -98,15 +56,6 @@ define <8 x float> @vector256_no_abs(<8 x float> %a) {
   ret <8 x float> %fsub
 }
 
-define <8 x float> @vector256_no_abs_unary_fneg(<8 x float> %a) {
-; CHECK-LABEL: vector256_no_abs_unary_fneg:
-; CHECK: vorps
-; CHECK-NEXT: retq
-  %fabs = tail call <8 x float> @llvm.fabs.v8f32(< 8 x float> %a) #1
-  %fsub = fneg <8 x float> %fabs
-  ret <8 x float> %fsub
-}
-
 define <8 x float> @vector256_uses_abs(<8 x float> %a) {
 ; CHECK-LABEL: vector256_uses_abs:
 ; CHECK-DAG: vandps
@@ -119,18 +68,6 @@ define <8 x float> @vector256_uses_abs(<8 x float> %a) {
   ret <8 x float> %fmul
 }
 
-define <8 x float> @vector256_uses_abs_unary_fneg(<8 x float> %a) {
-; CHECK-LABEL: vector256_uses_abs_unary_fneg:
-; CHECK-DAG: vandps
-; CHECK-DAG: vorps
-; CHECK: vmulps
-; CHECK-NEXT: retq
-  %fabs = tail call <8 x float> @llvm.fabs.v8f32(<8 x float> %a) #1
-  %fsub = fneg <8 x float> %fabs
-  %fmul = fmul <8 x float> %fsub, %fabs
-  ret <8 x float> %fmul
-}
-
 declare <4 x float> @llvm.fabs.v4f32(<4 x float> %p)
 declare <8 x float> @llvm.fabs.v8f32(<8 x float> %p)
 
-- 
2.40.0