From fafcf424107364297b71d9bf939d7d22d996a88b Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Sun, 17 Sep 2017 18:59:30 +0000 Subject: [PATCH] [X86] Colocate all of the X86VBroadcast patterns for v2i64 and v2f64. NFC The memory patterns were near the MOVDDUP definition, but the non-memory patterns were near the broadcast instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313494 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrSSE.td | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 4bf42b026d1..b8d1240b4e2 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -4755,13 +4755,6 @@ let Predicates = [HasAVX, NoVLX] in { (VMOVDDUPrm addr:$src)>, Requires<[HasAVX]>; } -let Predicates = [HasAVX, NoVLX] in -def : Pat<(v2f64 (X86VBroadcast (loadf64 addr:$src))), - (VMOVDDUPrm addr:$src)>; -let Predicates = [HasAVX1Only] in -def : Pat<(v2i64 (X86VBroadcast (loadi64 addr:$src))), - (VMOVDDUPrm addr:$src)>; - let Predicates = [UseSSE3] in { // No need for aligned memory as this only loads 64-bits. def : Pat<(X86Movddup (loadv2f64 addr:$src)), @@ -7982,6 +7975,8 @@ let Predicates = [HasAVX, NoVLX] in { // 128bit broadcasts: def : Pat<(v2f64 (X86VBroadcast f64:$src)), (VMOVDDUPrr (COPY_TO_REGCLASS FR64:$src, VR128))>; + def : Pat<(v2f64 (X86VBroadcast (loadf64 addr:$src))), + (VMOVDDUPrm addr:$src)>; } let Predicates = [HasAVX1Only] in { @@ -8009,6 +8004,8 @@ let Predicates = [HasAVX1Only] in { def : Pat<(v2i64 (X86VBroadcast i64:$src)), (VPSHUFDri (COPY_TO_REGCLASS GR64:$src, VR128), 0x44)>; + def : Pat<(v2i64 (X86VBroadcast (loadi64 addr:$src))), + (VMOVDDUPrm addr:$src)>; } //===----------------------------------------------------------------------===// -- 2.40.0