From fa62d55710f1c9ee1f6e670d31ff2020844f3e5c Mon Sep 17 00:00:00 2001 From: Ahmed Bougacha Date: Tue, 7 Mar 2017 20:53:00 +0000 Subject: [PATCH] [GlobalISel] Add vector select translation test. NFC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297206 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../AArch64/GlobalISel/arm64-irtranslator.ll | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll b/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll index 7539ceef451..17ed0169c98 100644 --- a/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll +++ b/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll @@ -945,6 +945,19 @@ define i8* @test_select_ptr(i1 %tst, i8* %lhs, i8* %rhs) { ret i8* %res } +; CHECK-LABEL: name: test_vselect_vec +; CHECK: [[TST32:%[0-9]+]](<4 x s32>) = COPY %q0 +; CHECK: [[LHS:%[0-9]+]](<4 x s32>) = COPY %q1 +; CHECK: [[RHS:%[0-9]+]](<4 x s32>) = COPY %q2 +; CHECK: [[TST:%[0-9]+]](<4 x s1>) = G_TRUNC [[TST32]](<4 x s32>) +; CHECK: [[RES:%[0-9]+]](<4 x s32>) = G_SELECT [[TST]](<4 x s1>), [[LHS]], [[RHS]] +; CHECK: %q0 = COPY [[RES]] +define <4 x i32> @test_vselect_vec(<4 x i32> %tst32, <4 x i32> %lhs, <4 x i32> %rhs) { + %tst = trunc <4 x i32> %tst32 to <4 x i1> + %res = select <4 x i1> %tst, <4 x i32> %lhs, <4 x i32> %rhs + ret <4 x i32> %res +} + ; CHECK-LABEL: name: test_fptosi ; CHECK: [[FPADDR:%[0-9]+]](p0) = COPY %x0 ; CHECK: [[FP:%[0-9]+]](s32) = G_LOAD [[FPADDR]](p0) -- 2.50.1