From f94271deae70b18a4ba765eba2e02ebf33802047 Mon Sep 17 00:00:00 2001
From: Chih-Hung Hsieh <chh@google.com>
Date: Mon, 18 Jul 2016 17:20:09 +0000
Subject: [PATCH] [X86] Accept SELECT op code for x86-64 fp128 type
DAGTypeLegalizer::CanSkipSoftenFloatOperand should allow
SELECT op code for x86_64 fp128 type for MME targets,
so SoftenFloatOperand does not abort on SELECT op code.
Differential Revision: http://reviews.llvm.org/D21758
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275818 91177308-0d34-0410-b5e6-96231b3b80d8
---
.../SelectionDAG/LegalizeFloatTypes.cpp | 1 +
test/CodeGen/X86/fp128-select.ll | 35 +++++++++++++++++++
2 files changed, 36 insertions(+)
create mode 100644 test/CodeGen/X86/fp128-select.ll
diff --git a/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
index 97a356fd2bc..31ebf7bbec1 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
@@ -816,6 +816,7 @@ bool DAGTypeLegalizer::CanSkipSoftenFloatOperand(SDNode *N, unsigned OpNo) {
case ISD::FCOPYSIGN:
case ISD::FNEG:
case ISD::Register:
+ case ISD::SELECT:
return true;
}
return false;
diff --git a/test/CodeGen/X86/fp128-select.ll b/test/CodeGen/X86/fp128-select.ll
new file mode 100644
index 00000000000..dc41d5095a7
--- /dev/null
+++ b/test/CodeGen/X86/fp128-select.ll
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx | FileCheck %s --check-prefix=MMX
+; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx | FileCheck %s --check-prefix=MMX
+; RUN: llc < %s -O2 -mtriple=x86_64-linux-android | FileCheck %s
+; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu | FileCheck %s
+
+define void @test_select(fp128* %p, fp128* %q, i1 zeroext %c) {
+; MMX-LABEL: test_select:
+; MMX: # BB#0:
+; MMX-NEXT: testb %dl, %dl
+; MMX-NEXT: jne .LBB0_1
+; MMX-NEXT: # BB#2:
+; MMX-NEXT: movaps {{.*}}(%rip), %xmm0
+; MMX-NEXT: movaps %xmm0, (%rsi)
+; MMX-NEXT: retq
+; MMX-NEXT: .LBB0_1:
+; MMX-NEXT: movaps (%rdi), %xmm0
+; MMX-NEXT: movaps %xmm0, (%rsi)
+; MMX-NEXT: retq
+;
+; CHECK-LABEL: test_select:
+; CHECK: # BB#0:
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: testb %dl, %dl
+; CHECK-NEXT: cmovneq (%rdi), %rax
+; CHECK-NEXT: movabsq $9223231299366420480, %rcx # imm = 0x7FFF800000000000
+; CHECK-NEXT: cmovneq 8(%rdi), %rcx
+; CHECK-NEXT: movq %rcx, 8(%rsi)
+; CHECK-NEXT: movq %rax, (%rsi)
+; CHECK-NEXT: retq
+ %a = load fp128, fp128* %p, align 2
+ %r = select i1 %c, fp128 %a, fp128 0xL00000000000000007FFF800000000000
+ store fp128 %r, fp128* %q
+ ret void
+}
--
2.40.0