From f8ca5148782261f1fc93cd35269401dcb37e72d1 Mon Sep 17 00:00:00 2001 From: Sanjoy Das Date: Wed, 1 Feb 2017 17:50:40 +0000 Subject: [PATCH] [ImplicitNullChecks] NFC Fix the implicit-null-checks.mir test Summary: Currently the test implicit-null-checks.mir crashes if we run llc with -enable-implicit-null-checks -start-before implicit-null-checks options. Change fixes the RET instruction causing the crash. Patch by Serguei Katkov! Reviewers: sanjoy, reames Reviewed By: sanjoy Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D29390 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293789 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/implicit-null-checks.mir | 28 +++++++++++------------ 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/test/CodeGen/X86/implicit-null-checks.mir b/test/CodeGen/X86/implicit-null-checks.mir index af9758fc8ad..97a1d6fff7c 100644 --- a/test/CodeGen/X86/implicit-null-checks.mir +++ b/test/CodeGen/X86/implicit-null-checks.mir @@ -208,15 +208,15 @@ body: | bb.2.ret_200: %eax = MOV32ri 200 - RET 0, %eax + RETQ %eax bb.3.is_null: %eax = MOV32ri 42 - RET 0, %eax + RETQ %eax bb.4.ret_100: %eax = MOV32ri 100 - RET 0, %eax + RETQ %eax ... --- @@ -258,11 +258,11 @@ body: | bb.3.is_null: liveins: %eax, %ah, %al, %ax, %bh, %bl, %bp, %bpl, %bx, %eax, %ebp, %ebx, %rax, %rbp, %rbx, %r12, %r13, %r14, %r15, %r12b, %r13b, %r14b, %r15b, %r12d, %r13d, %r14d, %r15d, %r12w, %r13w, %r14w, %r15w - RET 0, %eax + RETQ %eax bb.4.ret_100: %eax = MOV32ri 100 - RET 0, %eax + RETQ %eax ... --- @@ -297,15 +297,15 @@ body: | bb.2.ret_200: %eax = MOV32ri 200 - RET 0, %eax + RETQ %eax bb.3.is_null: %eax = MOV32ri 42 - RET 0, %eax + RETQ %eax bb.4.ret_100: %eax = MOV32ri 100 - RET 0, %eax + RETQ %eax ... --- @@ -339,15 +339,15 @@ body: | bb.2.ret_200: %eax = MOV32ri 200 - RET 0, %eax + RETQ %eax bb.3.is_null: %eax = MOV32ri 42 - RET 0, %eax + RETQ %eax bb.4.ret_100: %eax = MOV32ri 100 - RET 0, %eax + RETQ %eax ... --- @@ -382,15 +382,15 @@ body: | bb.2.ret_200: %eax = MOV32ri 200 - RET 0, %eax + RETQ %eax bb.3.is_null: %eax = MOV32ri 42 - RET 0, %eax + RETQ %eax bb.4.ret_100: %eax = MOV32ri 100 - RET 0, %eax + RETQ %eax ... --- -- 2.50.1