From f789c57348f2c28214ea26a2c0b4260ab3c1af50 Mon Sep 17 00:00:00 2001
From: Tim Northover <tnorthover@apple.com>
Date: Wed, 2 Jul 2014 10:25:45 +0000
Subject: [PATCH] X86: inline all atomic operations up to 128-bits.

The backend *can* cope with all of these now, so Clang should give it the
chance. On CPUs without cmpxchg16b (e.g. the original athlon64) LLVM can reform
the libcalls.

rdar://problem/13496295

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@212173 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Basic/Targets.cpp            |  4 +---
 test/CodeGen/x86_64-atomic-128.c | 29 +++++++++++++++++++++++++++++
 2 files changed, 30 insertions(+), 3 deletions(-)
 create mode 100644 test/CodeGen/x86_64-atomic-128.c

diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index 7f5ee91d49..b0dc335638 100644
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -3292,10 +3292,8 @@ public:
     ComplexLongDoubleUsesFP2Ret = true;
 
     // x86-64 has atomics up to 16 bytes.
-    // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
-    // on CPUs with cmpxchg16b
     MaxAtomicPromoteWidth = 128;
-    MaxAtomicInlineWidth = 64;
+    MaxAtomicInlineWidth = 128;
   }
   BuiltinVaListKind getBuiltinVaListKind() const override {
     return TargetInfo::X86_64ABIBuiltinVaList;
diff --git a/test/CodeGen/x86_64-atomic-128.c b/test/CodeGen/x86_64-atomic-128.c
new file mode 100644
index 0000000000..2069e45582
--- /dev/null
+++ b/test/CodeGen/x86_64-atomic-128.c
@@ -0,0 +1,29 @@
+// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck %s
+
+// All atomics up to 16 bytes should be emitted inline on x86_64. The
+// backend can reform __sync_whatever calls if necessary (e.g. the CPU
+// doesn't have cmpxchg16b).
+
+__int128 test_sync_call(__int128 *addr, __int128 val) {
+  // CHECK-LABEL: @test_sync_call
+  // CHECK: atomicrmw add i128
+  return __sync_fetch_and_add(addr, val);
+}
+
+__int128 test_c11_call(_Atomic __int128 *addr, __int128 val) {
+  // CHECK-LABEL: @test_c11_call
+  // CHECK: atomicrmw sub
+  return __c11_atomic_fetch_sub(addr, val, 0);
+}
+
+__int128 test_atomic_call(__int128 *addr, __int128 val) {
+  // CHECK-LABEL: @test_atomic_call
+  // CHECK: atomicrmw or
+  return __atomic_fetch_or(addr, val, 0);
+}
+
+__int128 test_expression(_Atomic __int128 *addr) {
+  // CHECK-LABEL: @test_expression
+  // CHECK: atomicrmw and
+  *addr &= 1;
+}
-- 
2.40.0