From f092f4409ae5a1c1463ed6e14cf168c1a7d7abf9 Mon Sep 17 00:00:00 2001 From: Amara Emerson Date: Fri, 6 Sep 2019 22:27:09 +0000 Subject: [PATCH] [AArch64][GlobalISel] Enable the localizer for optimized builds. Despite the fact that the localizer's original motivation was to fix horrendous constant spilling at -O0, shortening live ranges still has net benefits even with optimizations enabled. On an -Os build of CTMark, doing this improves code size by 0.5% geomean. There are a few regressions, bullet increasing in size by 0.5%. One example from bullet where code size increased slightly was due to GlobalISel actually now generating the same code as SelectionDAG. So we actually have an opportunity in future to implement better heuristics for localization and therefore be *better* than SDAG in some cases. In relation to other optimizations though that one is relatively minor. Differential Revision: https://reviews.llvm.org/D67303 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371266 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AArch64/AArch64TargetMachine.cpp | 4 +--- test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll | 2 +- .../CodeGen/AArch64/GlobalISel/localizer-in-O0-pipeline.mir | 6 +++--- test/CodeGen/AArch64/GlobalISel/swifterror.ll | 2 +- 4 files changed, 6 insertions(+), 8 deletions(-) diff --git a/lib/Target/AArch64/AArch64TargetMachine.cpp b/lib/Target/AArch64/AArch64TargetMachine.cpp index 227d023400e..c3a8ace304a 100644 --- a/lib/Target/AArch64/AArch64TargetMachine.cpp +++ b/lib/Target/AArch64/AArch64TargetMachine.cpp @@ -518,9 +518,7 @@ bool AArch64PassConfig::addRegBankSelect() { } void AArch64PassConfig::addPreGlobalInstructionSelect() { - // Workaround the deficiency of the fast register allocator. - if (TM->getOptLevel() == CodeGenOpt::None) - addPass(new Localizer()); + addPass(new Localizer()); } bool AArch64PassConfig::addGlobalInstructionSelect() { diff --git a/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll b/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll index fd7809fa0c1..b7588d0447f 100644 --- a/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll +++ b/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll @@ -51,7 +51,7 @@ ; VERIFY-NEXT: Verify generated machine code ; ENABLED-NEXT: RegBankSelect ; VERIFY-NEXT: Verify generated machine code -; ENABLED-O0-NEXT: Localizer +; ENABLED-NEXT: Localizer ; VERIFY-O0-NEXT: Verify generated machine code ; ENABLED-NEXT: Analysis for ComputingKnownBits ; ENABLED-NEXT: InstructionSelect diff --git a/test/CodeGen/AArch64/GlobalISel/localizer-in-O0-pipeline.mir b/test/CodeGen/AArch64/GlobalISel/localizer-in-O0-pipeline.mir index 5d4dad69166..869b328a752 100644 --- a/test/CodeGen/AArch64/GlobalISel/localizer-in-O0-pipeline.mir +++ b/test/CodeGen/AArch64/GlobalISel/localizer-in-O0-pipeline.mir @@ -60,18 +60,18 @@ registers: # Second block will get the constant 1.0 when the localizer is enabled. # CHECK: bb.1.{{[a-zA-Z0-9]+}}: -# OPT-NOT: G_FCONSTANT +# OPT: [[FONE:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00 # OPTNONE: [[FONE:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00 # CHECK: G_BR %bb.3 # Thrid block will get the constant 2.0 when the localizer is enabled. # CHECK: bb.2.{{[a-zA-Z0-9]+}}: -# OPT-NOT: G_FCONSTANT +# OPT: [[FTWO:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 2.000000e+00 # OPTNONE: [[FTWO:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 2.000000e+00 # CHECK: bb.3.end # OPTNONE: %2:fpr(s32) = PHI [[FONE]](s32), %bb.1, [[FTWO]](s32), %bb.2 -# OPT: %2:fpr(s32) = PHI %4(s32), %bb.1, %5(s32), %bb.2 +# OPT: %2:fpr(s32) = PHI [[FONE]](s32), %bb.1, [[FTWO]](s32), %bb.2 # CHECK-NEXT: G_FADD %0, %2 body: | bb.0 (%ir-block.0): diff --git a/test/CodeGen/AArch64/GlobalISel/swifterror.ll b/test/CodeGen/AArch64/GlobalISel/swifterror.ll index 7a4184ca4e9..8e0c287725a 100644 --- a/test/CodeGen/AArch64/GlobalISel/swifterror.ll +++ b/test/CodeGen/AArch64/GlobalISel/swifterror.ll @@ -98,9 +98,9 @@ handler: define float @foo_if(%swift_error** swifterror %error_ptr_ref, i32 %cc) { ; CHECK-LABEL: foo_if: ; CHECK: cbz w0 -; CHECK: mov [[ID:w[0-9]+]], #1 ; CHECK: mov w0, #16 ; CHECK: malloc +; CHECK: mov [[ID:w[0-9]+]], #1 ; CHECK: strb [[ID]], [x0, #8] ; CHECK: mov x21, x0 ; CHECK-NOT: x21 -- 2.40.0