From eab2fdc64a99682a4422b894755496437412e70c Mon Sep 17 00:00:00 2001 From: Serge Rogatch Date: Thu, 26 Jan 2017 16:17:03 +0000 Subject: [PATCH] [XRay][Arm32] Reduce the portion of the stub and implement more staging for tail calls - in LLVM Summary: This patch provides more staging for tail calls in XRay Arm32 . When the logging part of XRay is ready for tail calls, its support in the core part of XRay Arm32 may be as easy as changing the number passed to the handler from 1 to 2. Coupled patch: - https://reviews.llvm.org/D28674 Reviewers: dberris, rengolin Reviewed By: dberris Subscribers: llvm-commits, iid_iunknown, aemerson, rengolin, dberris Differential Revision: https://reviews.llvm.org/D28673 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293185 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMBaseInstrInfo.cpp | 13 +++++++++++++ lib/Target/ARM/ARMBaseInstrInfo.h | 2 ++ 2 files changed, 15 insertions(+) diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index 28ad3184556..e42f4007f34 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -4696,6 +4696,19 @@ bool ARMBaseInstrInfo::hasNOP() const { return Subtarget.getFeatureBits()[ARM::HasV6KOps]; } +bool ARMBaseInstrInfo::isTailCall(const MachineInstr &Inst) const +{ + switch (Inst.getOpcode()) { + case ARM::TAILJMPd: + case ARM::TAILJMPr: + case ARM::TCRETURNdi: + case ARM::TCRETURNri: + return true; + default: + return false; + } +} + bool ARMBaseInstrInfo::isSwiftFastImmShift(const MachineInstr *MI) const { if (MI->getNumOperands() < 4) return true; diff --git a/lib/Target/ARM/ARMBaseInstrInfo.h b/lib/Target/ARM/ARMBaseInstrInfo.h index a02c66ee9e2..2e0f1f8af91 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.h +++ b/lib/Target/ARM/ARMBaseInstrInfo.h @@ -104,6 +104,8 @@ public: getNoopForMachoTarget(NopInst); } + bool isTailCall(const MachineInstr &Inst) const override; + // Return the non-pre/post incrementing version of 'Opc'. Return 0 // if there is not such an opcode. virtual unsigned getUnindexedOpcode(unsigned Opc) const =0; -- 2.50.1