From e7e7c38dce199b1f807e255b0d84dc7d54c8e237 Mon Sep 17 00:00:00 2001 From: Renato Golin Date: Thu, 20 Aug 2015 15:05:48 +0000 Subject: [PATCH] Revert "[SimplifyCFG] Be more aggressive" on branch_37 This reverts commit r229099 in branch 37 only, because it caused PR24292. I'll continue investigating and will fix on trunk, but being an optimization change, we can let the rest of the release go without this one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_37@245568 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Transforms/Utils/SimplifyCFG.cpp | 8 ++--- test/CodeGen/AArch64/analyzecmp.ll | 8 ++--- test/CodeGen/AArch64/arm64-promote-const.ll | 36 ++++++++++++++++++--- 3 files changed, 37 insertions(+), 15 deletions(-) diff --git a/lib/Transforms/Utils/SimplifyCFG.cpp b/lib/Transforms/Utils/SimplifyCFG.cpp index 36781c1189c..dd7721a0ba5 100644 --- a/lib/Transforms/Utils/SimplifyCFG.cpp +++ b/lib/Transforms/Utils/SimplifyCFG.cpp @@ -53,13 +53,9 @@ using namespace PatternMatch; #define DEBUG_TYPE "simplifycfg" -// Chosen as 2 so as to be cheap, but still to have enough power to fold -// a select, so the "clamp" idiom (of a min followed by a max) will be caught. -// To catch this, we need to fold a compare and a select, hence '2' being the -// minimum reasonable default. static cl::opt -PHINodeFoldingThreshold("phi-node-folding-threshold", cl::Hidden, cl::init(2), - cl::desc("Control the amount of phi node folding to perform (default = 2)")); +PHINodeFoldingThreshold("phi-node-folding-threshold", cl::Hidden, cl::init(1), + cl::desc("Control the amount of phi node folding to perform (default = 1)")); static cl::opt DupRet("simplifycfg-dup-ret", cl::Hidden, cl::init(false), diff --git a/test/CodeGen/AArch64/analyzecmp.ll b/test/CodeGen/AArch64/analyzecmp.ll index 0b3bcd887b5..8962505cbd1 100644 --- a/test/CodeGen/AArch64/analyzecmp.ll +++ b/test/CodeGen/AArch64/analyzecmp.ll @@ -1,9 +1,9 @@ ; RUN: llc -O3 -mcpu=cortex-a57 < %s | FileCheck %s -; CHECK-LABEL: @test -; CHECK: and -; CHECK: csel -; CHECK: csel +; CHECK-LABLE: @test +; CHECK: tst [[CMP:x[0-9]+]], #0x8000000000000000 +; CHECK: csel [[R0:x[0-9]+]], [[S0:x[0-9]+]], [[S1:x[0-9]+]], eq +; CHECK: csel [[R1:x[0-9]+]], [[S2:x[0-9]+]], [[S3:x[0-9]+]], eq target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128" target triple = "arm64--linux-gnueabi" diff --git a/test/CodeGen/AArch64/arm64-promote-const.ll b/test/CodeGen/AArch64/arm64-promote-const.ll index 0be2f5c08c0..349edc46fec 100644 --- a/test/CodeGen/AArch64/arm64-promote-const.ll +++ b/test/CodeGen/AArch64/arm64-promote-const.ll @@ -135,13 +135,39 @@ define <16 x i8> @test5(<16 x i8> %arg, i32 %path) { ; In stress mode, constant vector are promoted ; Since, the constant is the same as the previous function, ; the same address must be used -; PROMOTED: ldr -; PROMOTED-NOT: ldr -; PROMOTED: ret +; PROMOTED: adrp [[PAGEADDR:x[0-9]+]], [[CSTV1]]@PAGE +; PROMOTED-NEXT: ldr q[[REGNUM:[0-9]+]], {{\[}}[[PAGEADDR]], [[CSTV1]]@PAGEOFF] +; PROMOTED-NEXT: cbz w0, [[LABEL:LBB.*]] +; Next BB +; PROMOTED: add.16b [[DESTV:v[0-9]+]], v0, v[[REGNUM]] +; PROMOTED-NEXT: mul.16b v[[REGNUM]], [[DESTV]], v[[REGNUM]] +; Next BB +; PROMOTED-NEXT: [[LABEL]]: +; PROMOTED-NEXT: mul.16b [[TMP1:v[0-9]+]], v[[REGNUM]], v[[REGNUM]] +; PROMOTED-NEXT: mul.16b [[TMP2:v[0-9]+]], [[TMP1]], [[TMP1]] +; PROMOTED-NEXT: mul.16b [[TMP3:v[0-9]+]], [[TMP2]], [[TMP2]] +; PROMOTED-NEXT: mul.16b v0, [[TMP3]], [[TMP3]] +; PROMOTED-NEXT: ret ; REGULAR-LABEL: test5: -; REGULAR: ldr -; REGULAR: ret +; REGULAR: cbz w0, [[LABELelse:LBB.*]] +; Next BB +; REGULAR: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL:lCP.*]]@PAGE +; REGULAR-NEXT: ldr q[[REGNUM:[0-9]+]], {{\[}}[[PAGEADDR]], [[CSTLABEL]]@PAGEOFF] +; REGULAR-NEXT: add.16b [[DESTV:v[0-9]+]], v0, v[[REGNUM]] +; REGULAR-NEXT: mul.16b v[[DESTREGNUM:[0-9]+]], [[DESTV]], v[[REGNUM]] +; REGULAR-NEXT: b [[LABELend:LBB.*]] +; Next BB +; REGULAR-NEXT: [[LABELelse]] +; REGULAR-NEXT: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL:lCP.*]]@PAGE +; REGULAR-NEXT: ldr q[[DESTREGNUM]], {{\[}}[[PAGEADDR]], [[CSTLABEL]]@PAGEOFF] +; Next BB +; REGULAR-NEXT: [[LABELend]]: +; REGULAR-NEXT: mul.16b [[TMP1:v[0-9]+]], v[[DESTREGNUM]], v[[DESTREGNUM]] +; REGULAR-NEXT: mul.16b [[TMP2:v[0-9]+]], [[TMP1]], [[TMP1]] +; REGULAR-NEXT: mul.16b [[TMP3:v[0-9]+]], [[TMP2]], [[TMP2]] +; REGULAR-NEXT: mul.16b v0, [[TMP3]], [[TMP3]] +; REGULAR-NEXT: ret entry: %tobool = icmp eq i32 %path, 0 br i1 %tobool, label %if.end, label %if.then -- 2.50.1