From e6b08107994087136265457f5d5ef06959d41091 Mon Sep 17 00:00:00 2001 From: Geoff Berry Date: Mon, 21 Nov 2016 22:51:10 +0000 Subject: [PATCH] [AArch64LoadStoreOptimizer] Don't treat write to XZR/WZR as a clobber. Summary: When searching for load/store instructions to pair/merge don't treat writes to WZR/XZR as clobbers since they don't change the value read from WZR/XZR (which is always 0). Reviewers: mcrosier, junbuml, jmolloy, t.p.northover Subscribers: aemerson, llvm-commits, rengolin Differential Revision: https://reviews.llvm.org/D26921 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287592 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../AArch64/AArch64LoadStoreOptimizer.cpp | 6 +++-- .../MIR/AArch64/ldst-opt-zr-clobber.mir | 27 +++++++++++++++++++ 2 files changed, 31 insertions(+), 2 deletions(-) create mode 100644 test/CodeGen/MIR/AArch64/ldst-opt-zr-clobber.mir diff --git a/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp b/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp index 7aed5d65600..6e157638184 100644 --- a/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp +++ b/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp @@ -863,8 +863,10 @@ static void trackRegDefsUses(const MachineInstr &MI, BitVector &ModifiedRegs, if (!Reg) continue; if (MO.isDef()) { - for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) - ModifiedRegs.set(*AI); + // WZR/XZR are not modified even when used as a destination register. + if (Reg != AArch64::WZR && Reg != AArch64::XZR) + for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) + ModifiedRegs.set(*AI); } else { assert(MO.isUse() && "Reg operand not a def and not a use?!?"); for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) diff --git a/test/CodeGen/MIR/AArch64/ldst-opt-zr-clobber.mir b/test/CodeGen/MIR/AArch64/ldst-opt-zr-clobber.mir new file mode 100644 index 00000000000..75ad849e4f3 --- /dev/null +++ b/test/CodeGen/MIR/AArch64/ldst-opt-zr-clobber.mir @@ -0,0 +1,27 @@ + +# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass aarch64-ldst-opt -verify-machineinstrs -o - %s | FileCheck %s + +--- | + define i1 @no-clobber-zr(i64* %p, i64 %x) { ret i1 0 } +... +--- +# Check that write of xzr doesn't inhibit pairing of xzr stores since +# it isn't actually clobbered. Written as a MIR test to avoid +# schedulers reordering instructions such that SUBS doesn't appear +# between stores. +# CHECK-LABEL: name: no-clobber-zr +# CHECK: STPXi %xzr, %xzr, %x0, 0 +name: no-clobber-zr +body: | + bb.0: + liveins: %x0, %x1 + STRXui %xzr, %x0, 0 :: (store 8 into %ir.p) + dead %xzr = SUBSXri killed %x1, 0, 0, implicit-def %nzcv + %w8 = CSINCWr %wzr, %wzr, 1, implicit killed %nzcv + STRXui %xzr, killed %x0, 1 :: (store 8 into %ir.p) + %w0 = ORRWrs %wzr, killed %w8, 0 + RET %lr, implicit %w0 +... + + + -- 2.50.1