From e3956787f6acaffd44c4dc5a8ab4f952728cce91 Mon Sep 17 00:00:00 2001 From: Mahavir Jain Date: Sat, 17 Nov 2018 00:05:56 +0530 Subject: [PATCH] clk: fix regression in clock setting for SPIRAM with 80MHz config Support for HSPI to output clock for 4M SPIRAM introduced regression in clock configuration affecting SPIRAM access with 80MHz clock. This commit fixes the issue. --- components/esp32/clk.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/components/esp32/clk.c b/components/esp32/clk.c index 5825a18657..c965511cbf 100644 --- a/components/esp32/clk.c +++ b/components/esp32/clk.c @@ -297,10 +297,10 @@ void esp_perip_clk_init(void) //a weird mode where clock to the peripheral is disabled but reset is also disabled, it 'hangs' //in a state where it outputs a continuous 80MHz signal. Mask its bit here because we should //not modify that state, regardless of what we calculated earlier. - if (!spicommon_periph_in_use(HSPI_HOST)) { + if (spicommon_periph_in_use(HSPI_HOST)) { common_perip_clk &= ~DPORT_SPI2_CLK_EN; } - if (!spicommon_periph_in_use(VSPI_HOST)) { + if (spicommon_periph_in_use(VSPI_HOST)) { common_perip_clk &= ~DPORT_SPI3_CLK_EN; } #endif -- 2.40.0