From e2cf2e02a7c94c5b7794f6c4cf31c98d7366f9b1 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Sun, 12 Jun 2016 00:41:19 +0000 Subject: [PATCH] [IR] Require ArrayRef of 'uint32_t' instead of 'int' for the mask argument for one of the signatures of CreateShuffleVector. This better emphasises that you can't use it for the -1 as undef behavior. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272491 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/IR/Constants.h | 1 - include/llvm/IR/IRBuilder.h | 2 +- lib/IR/AutoUpgrade.cpp | 21 ++++++++++--------- lib/IR/Constants.cpp | 5 ----- .../InstCombine/InstCombineCalls.cpp | 6 +++--- 5 files changed, 15 insertions(+), 20 deletions(-) diff --git a/include/llvm/IR/Constants.h b/include/llvm/IR/Constants.h index e7c109379e4..2a5d14d9464 100644 --- a/include/llvm/IR/Constants.h +++ b/include/llvm/IR/Constants.h @@ -725,7 +725,6 @@ public: static Constant *get(LLVMContext &Context, ArrayRef Elts); static Constant *get(LLVMContext &Context, ArrayRef Elts); static Constant *get(LLVMContext &Context, ArrayRef Elts); - static Constant *get(LLVMContext &Context, ArrayRef Elts); static Constant *get(LLVMContext &Context, ArrayRef Elts); static Constant *get(LLVMContext &Context, ArrayRef Elts); static Constant *get(LLVMContext &Context, ArrayRef Elts); diff --git a/include/llvm/IR/IRBuilder.h b/include/llvm/IR/IRBuilder.h index de01d9f23b6..efe4c381b26 100644 --- a/include/llvm/IR/IRBuilder.h +++ b/include/llvm/IR/IRBuilder.h @@ -1646,7 +1646,7 @@ public: return Insert(new ShuffleVectorInst(V1, V2, Mask), Name); } - Value *CreateShuffleVector(Value *V1, Value *V2, ArrayRef IntMask, + Value *CreateShuffleVector(Value *V1, Value *V2, ArrayRef IntMask, const Twine &Name = "") { Value *Mask = ConstantDataVector::get(Context, IntMask); return CreateShuffleVector(V1, V2, Mask, Name); diff --git a/lib/IR/AutoUpgrade.cpp b/lib/IR/AutoUpgrade.cpp index 9a4e4b520fc..c9a36a68e32 100644 --- a/lib/IR/AutoUpgrade.cpp +++ b/lib/IR/AutoUpgrade.cpp @@ -352,7 +352,7 @@ static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, LLVMContext &C, // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, // we'll just return the zero vector. if (Shift < 16) { - int Idxs[64]; + uint32_t Idxs[64]; // 256/512-bit version is split into 2/4 16-byte lanes. for (unsigned l = 0; l != NumElts; l += 16) for (unsigned i = 0; i != 16; ++i) { @@ -390,7 +390,7 @@ static Value *UpgradeX86PALIGNRIntrinsics(IRBuilder<> &Builder, LLVMContext &C, Op0 = llvm::Constant::getNullValue(Op0->getType()); } - int Indices[64]; + uint32_t Indices[64]; // 256-bit palignr operates on 128-bit lanes so we need to handle that for (unsigned l = 0; l != NumElts; l += 16) { for (unsigned i = 0; i != 16; ++i) { @@ -434,7 +434,7 @@ static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, LLVMContext &C, // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, // we'll just return the zero vector. if (Shift < 16) { - int Idxs[64]; + uint32_t Idxs[64]; // 256/512-bit version is split into 2/4 16-byte lanes. for (unsigned l = 0; l != NumElts; l += 16) for (unsigned i = 0; i != 16; ++i) { @@ -474,7 +474,7 @@ static Value *UpgradeMaskedStore(IRBuilder<> &Builder, LLVMContext &C, // If we have less than 8 elements, then the starting mask was an i8 and // we need to extract down to the right number of elements. if (NumElts < 8) { - int Indices[4]; + uint32_t Indices[4]; for (unsigned i = 0; i != NumElts; ++i) Indices[i] = i; Mask = Builder.CreateShuffleVector(Mask, Mask, @@ -508,7 +508,7 @@ static Value *UpgradeMaskedLoad(IRBuilder<> &Builder, LLVMContext &C, // If we have less than 8 elements, then the starting mask was an i8 and // we need to extract down to the right number of elements. if (NumElts < 8) { - int Indices[4]; + uint32_t Indices[4]; for (unsigned i = 0; i != NumElts; ++i) Indices[i] = i; Mask = Builder.CreateShuffleVector(Mask, Mask, @@ -562,8 +562,9 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { unsigned NumDstElts = DstTy->getNumElements(); if (NumDstElts < SrcTy->getNumElements()) { assert(NumDstElts == 2 && "Unexpected vector size"); - const int ShuffleMask[2] = { 0, 1 }; - Rep = Builder.CreateShuffleVector(Rep, UndefValue::get(SrcTy), ShuffleMask); + uint32_t ShuffleMask[2] = { 0, 1 }; + Rep = Builder.CreateShuffleVector(Rep, UndefValue::get(SrcTy), + ShuffleMask); } bool Int2Double = (StringRef::npos != Name.find("cvtdq2")); @@ -748,8 +749,8 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { unsigned NumDstElts = DstTy->getNumElements(); // Extract a subvector of the first NumDstElts lanes and sign/zero extend. - SmallVector ShuffleMask; - for (int i = 0; i != (int)NumDstElts; ++i) + SmallVector ShuffleMask; + for (unsigned i = 0; i != NumDstElts; ++i) ShuffleMask.push_back(i); Value *SV = Builder.CreateShuffleVector( @@ -764,7 +765,7 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0), PointerType::getUnqual(VT)); Value *Load = Builder.CreateLoad(VT, Op); - const int Idxs[4] = { 0, 1, 0, 1 }; + uint32_t Idxs[4] = { 0, 1, 0, 1 }; Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), Idxs); } else if (Name.startswith("llvm.x86.avx2.pbroadcast") || diff --git a/lib/IR/Constants.cpp b/lib/IR/Constants.cpp index 37cffe38bab..35233ae522a 100644 --- a/lib/IR/Constants.cpp +++ b/lib/IR/Constants.cpp @@ -2500,11 +2500,6 @@ Constant *ConstantDataVector::get(LLVMContext &Context, ArrayRef Elts) const char *Data = reinterpret_cast(Elts.data()); return getImpl(StringRef(const_cast(Data), Elts.size()*4), Ty); } -Constant *ConstantDataVector::get(LLVMContext &Context, ArrayRef Elts){ - Type *Ty = VectorType::get(Type::getInt32Ty(Context), Elts.size()); - const char *Data = reinterpret_cast(Elts.data()); - return getImpl(StringRef(const_cast(Data), Elts.size()*4), Ty); -} Constant *ConstantDataVector::get(LLVMContext &Context, ArrayRef Elts){ Type *Ty = VectorType::get(Type::getInt64Ty(Context), Elts.size()); const char *Data = reinterpret_cast(Elts.data()); diff --git a/lib/Transforms/InstCombine/InstCombineCalls.cpp b/lib/Transforms/InstCombine/InstCombineCalls.cpp index e124dbdc1a9..1aa4b87bb92 100644 --- a/lib/Transforms/InstCombine/InstCombineCalls.cpp +++ b/lib/Transforms/InstCombine/InstCombineCalls.cpp @@ -502,7 +502,7 @@ static Value *simplifyX86insertps(const IntrinsicInst &II, return ZeroVector; // Initialize by passing all of the first source bits through. - int ShuffleMask[4] = { 0, 1, 2, 3 }; + uint32_t ShuffleMask[4] = { 0, 1, 2, 3 }; // We may replace the second operand with the zero vector. Value *V1 = II.getArgOperand(1); @@ -890,7 +890,7 @@ static Value *simplifyX86vperm2(const IntrinsicInst &II, // If 0 or 1 zero mask bits are set, this is a simple shuffle. unsigned NumElts = VecTy->getNumElements(); unsigned HalfSize = NumElts / 2; - SmallVector ShuffleMask(NumElts); + SmallVector ShuffleMask(NumElts); // The high bit of the selection field chooses the 1st or 2nd operand. bool LowInputSelect = Imm & 0x02; @@ -1568,7 +1568,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) { if (isa(Arg)) { auto VectorHalfAsShorts = Arg; if (RetWidth < ArgWidth) { - SmallVector SubVecMask; + SmallVector SubVecMask; for (unsigned i = 0; i != RetWidth; ++i) SubVecMask.push_back((int)i); VectorHalfAsShorts = Builder->CreateShuffleVector( -- 2.50.1