From e2b32bc8dd8e4cbec63eea0593d217f8ca40428c Mon Sep 17 00:00:00 2001
From: Yi Kong <Yi.Kong@arm.com>
Date: Tue, 26 Aug 2014 12:48:11 +0000
Subject: [PATCH] arm_acle: Add mappings for dbg intrinsic

This completes all ACLE hint intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@216453 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Headers/arm_acle.h  | 4 ++++
 test/CodeGen/arm_acle.c | 8 ++++++++
 test/Sema/arm_acle.c    | 9 +++++++++
 3 files changed, 21 insertions(+)

diff --git a/lib/Headers/arm_acle.h b/lib/Headers/arm_acle.h
index cc7171b6ae..f7c71a6465 100644
--- a/lib/Headers/arm_acle.h
+++ b/lib/Headers/arm_acle.h
@@ -66,6 +66,10 @@ static __inline__ void __attribute__((always_inline, nodebug)) __yield(void) {
 }
 #endif
 
+#if __ARM_32BIT_STATE
+#define __dbg(t) __builtin_arm_dbg(t)
+#endif
+
 /* 8.5 Swap */
 static __inline__ uint32_t __attribute__((always_inline, nodebug))
   __swp(uint32_t x, volatile uint32_t *p) {
diff --git a/test/CodeGen/arm_acle.c b/test/CodeGen/arm_acle.c
index 01f8de649d..0f226b516d 100644
--- a/test/CodeGen/arm_acle.c
+++ b/test/CodeGen/arm_acle.c
@@ -62,6 +62,14 @@ void test_sevl(void) {
   __sevl();
 }
 
+#if __ARM_32BIT_STATE
+// AArch32-LABEL: test_dbg
+// AArch32: call void @llvm.arm.dbg(i32 0)
+void test_dbg(void) {
+  __dbg(0);
+}
+#endif
+
 /* 8.5 Swap */
 // ARM-LABEL: test_swp
 // AArch32: call i32 @llvm.arm.ldrex
diff --git a/test/Sema/arm_acle.c b/test/Sema/arm_acle.c
index 2d1d68a886..ec0d55854e 100644
--- a/test/Sema/arm_acle.c
+++ b/test/Sema/arm_acle.c
@@ -37,3 +37,12 @@ int32_t test_usat_const_diag(int32_t t, const int32_t v) {
 void test_pldx_const_diag(int32_t i) {
   __pldx(i, 0, 0, 0);  // expected-error-re {{argument to {{.*}} must be a constant integer}}
 }
+
+/*
+ * DBG intrinsic
+ * First argument for DBG intrinsic must be compile-time constant,
+ * otherwise an error should be raised.
+ */
+void test_dbg_const_diag(unsigned int t) {
+  __dbg(t);  // expected-error-re {{argument to {{.*}} must be a constant integer}}
+}
-- 
2.40.0