From dfd65928bdab4709dc69203119785ad3016a7a24 Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Thu, 24 Jul 2014 09:48:54 +0000 Subject: [PATCH] Merging r213847: ------------------------------------------------------------------------ r213847 | dsanders | 2014-07-24 10:47:14 +0100 (Thu, 24 Jul 2014) | 8 lines [mips] Fix ll and sc instructions Summary: The ll and sc instructions for r6 and non-r6 are misplaced. This patch fixes that. Patch by Jyun-Yan You Differential Revision: http://reviews.llvm.org/D4578 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@213848 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MipsISelLowering.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index 12b339188b1..40dc8e41b05 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -969,16 +969,16 @@ MipsTargetLowering::emitAtomicBinary(MachineInstr *MI, MachineBasicBlock *BB, LL = Mips::LL_MM; SC = Mips::SC_MM; } else { - LL = Subtarget.hasMips32r6() ? Mips::LL : Mips::LL_R6; - SC = Subtarget.hasMips32r6() ? Mips::SC : Mips::SC_R6; + LL = Subtarget.hasMips32r6() ? Mips::LL_R6 : Mips::LL; + SC = Subtarget.hasMips32r6() ? Mips::SC_R6 : Mips::SC; } AND = Mips::AND; NOR = Mips::NOR; ZERO = Mips::ZERO; BEQ = Mips::BEQ; } else { - LL = Subtarget.hasMips64r6() ? Mips::LLD : Mips::LLD_R6; - SC = Subtarget.hasMips64r6() ? Mips::SCD : Mips::SCD_R6; + LL = Subtarget.hasMips64r6() ? Mips::LLD_R6 : Mips::LLD; + SC = Subtarget.hasMips64r6() ? Mips::SCD_R6 : Mips::SCD; AND = Mips::AND64; NOR = Mips::NOR64; ZERO = Mips::ZERO_64; -- 2.40.0