From db88473ea9c9f98b152b6d2c78c75bdb1179957f Mon Sep 17 00:00:00 2001 From: Angie Chiang Date: Wed, 28 Oct 2015 14:10:11 -0700 Subject: [PATCH] Add dct_adst config to vp10_inv_txfm2d_cfg Change-Id: Id6fd8558452f64c4ac30d7cb656b659f0587b5d6 --- vp10/common/vp10_inv_txfm2d_cfg.h | 92 +++++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+) diff --git a/vp10/common/vp10_inv_txfm2d_cfg.h b/vp10/common/vp10_inv_txfm2d_cfg.h index 59f8542af..25b7f68aa 100644 --- a/vp10/common/vp10_inv_txfm2d_cfg.h +++ b/vp10/common/vp10_inv_txfm2d_cfg.h @@ -100,4 +100,96 @@ static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_32 = { .txfm_func_col = vp10_idct32_new, .txfm_func_row = vp10_idct32_new}; +// ---------------- config inv_dct_adst_4 ---------------- +static const int8_t inv_shift_dct_adst_4[2] = {1, -5}; +static const int8_t inv_stage_range_col_dct_adst_4[4] = {17, 17, 16, 16}; +static const int8_t inv_stage_range_row_dct_adst_4[6] = {16, 16, 16, + 16, 16, 16}; +static const int8_t inv_cos_bit_col_dct_adst_4[4] = {15, 15, 15, 15}; +static const int8_t inv_cos_bit_row_dct_adst_4[6] = {15, 15, 15, 15, 15, 15}; + +static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_4 = { + .txfm_size = 4, + .stage_num_col = 4, + .stage_num_row = 6, + + .shift = inv_shift_dct_adst_4, + .stage_range_col = inv_stage_range_col_dct_adst_4, + .stage_range_row = inv_stage_range_row_dct_adst_4, + .cos_bit_col = inv_cos_bit_col_dct_adst_4, + .cos_bit_row = inv_cos_bit_row_dct_adst_4, + .txfm_func_col = vp10_idct4_new, + .txfm_func_row = vp10_iadst4_new}; + +// ---------------- config inv_dct_adst_8 ---------------- +static const int8_t inv_shift_dct_adst_8[2] = {-1, -4}; +static const int8_t inv_stage_range_col_dct_adst_8[6] = {16, 16, 16, + 16, 15, 15}; +static const int8_t inv_stage_range_row_dct_adst_8[8] = {17, 17, 17, 17, + 17, 17, 17, 17}; +static const int8_t inv_cos_bit_col_dct_adst_8[6] = {15, 15, 15, 15, 15, 15}; +static const int8_t inv_cos_bit_row_dct_adst_8[8] = {15, 15, 15, 15, + 15, 15, 15, 15}; + +static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_8 = { + .txfm_size = 8, + .stage_num_col = 6, + .stage_num_row = 8, + + .shift = inv_shift_dct_adst_8, + .stage_range_col = inv_stage_range_col_dct_adst_8, + .stage_range_row = inv_stage_range_row_dct_adst_8, + .cos_bit_col = inv_cos_bit_col_dct_adst_8, + .cos_bit_row = inv_cos_bit_row_dct_adst_8, + .txfm_func_col = vp10_idct8_new, + .txfm_func_row = vp10_iadst8_new}; + +// ---------------- config inv_dct_adst_16 ---------------- +static const int8_t inv_shift_dct_adst_16[2] = {1, -7}; +static const int8_t inv_stage_range_col_dct_adst_16[8] = {19, 19, 19, 19, + 19, 19, 18, 18}; +static const int8_t inv_stage_range_row_dct_adst_16[10] = {18, 18, 18, 18, 18, + 18, 18, 18, 18, 18}; +static const int8_t inv_cos_bit_col_dct_adst_16[8] = {13, 13, 13, 13, + 13, 13, 13, 14}; +static const int8_t inv_cos_bit_row_dct_adst_16[10] = {14, 14, 14, 14, 14, + 14, 14, 14, 14, 14}; + +static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_16 = { + .txfm_size = 16, + .stage_num_col = 8, + .stage_num_row = 10, + + .shift = inv_shift_dct_adst_16, + .stage_range_col = inv_stage_range_col_dct_adst_16, + .stage_range_row = inv_stage_range_row_dct_adst_16, + .cos_bit_col = inv_cos_bit_col_dct_adst_16, + .cos_bit_row = inv_cos_bit_row_dct_adst_16, + .txfm_func_col = vp10_idct16_new, + .txfm_func_row = vp10_iadst16_new}; + +// ---------------- config inv_dct_adst_32 ---------------- +static const int8_t inv_shift_dct_adst_32[2] = {-1, -6}; +static const int8_t inv_stage_range_col_dct_adst_32[10] = {18, 18, 18, 18, 18, + 18, 18, 18, 17, 17}; +static const int8_t inv_stage_range_row_dct_adst_32[12] = { + 19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 19}; +static const int8_t inv_cos_bit_col_dct_adst_32[10] = {14, 14, 14, 14, 14, + 14, 14, 14, 14, 15}; +static const int8_t inv_cos_bit_row_dct_adst_32[12] = {13, 13, 13, 13, 13, 13, + 13, 13, 13, 13, 13, 13}; + +static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_adst_32 = { + .txfm_size = 32, + .stage_num_col = 10, + .stage_num_row = 12, + + .shift = inv_shift_dct_adst_32, + .stage_range_col = inv_stage_range_col_dct_adst_32, + .stage_range_row = inv_stage_range_row_dct_adst_32, + .cos_bit_col = inv_cos_bit_col_dct_adst_32, + .cos_bit_row = inv_cos_bit_row_dct_adst_32, + .txfm_func_col = vp10_idct32_new, + .txfm_func_row = vp10_iadst32_new}; + #endif // VP10_INV_TXFM2D_CFG_H_ -- 2.40.0