From db683c0a2b52865458a650e6c16bf9f14ea085e7 Mon Sep 17 00:00:00 2001 From: Bradley Smith Date: Wed, 29 Apr 2015 14:32:06 +0000 Subject: [PATCH] Revert code changes made under r235976. This issue was fixed elsewhere in r235396 in a more general way, hence these changes no longer do anything. Keep the testcase however, to ensure that we don't regress this for ARM. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@236104 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/clang/Basic/TargetInfo.h | 10 ---------- lib/Basic/TargetInfo.cpp | 1 - lib/Basic/Targets.cpp | 6 ------ lib/CodeGen/CodeGenModule.cpp | 17 ----------------- 4 files changed, 34 deletions(-) diff --git a/include/clang/Basic/TargetInfo.h b/include/clang/Basic/TargetInfo.h index cb7570ad4a..8406205c7f 100644 --- a/include/clang/Basic/TargetInfo.h +++ b/include/clang/Basic/TargetInfo.h @@ -204,11 +204,6 @@ protected: /// not for language specific address spaces bool UseAddrSpaceMapMangling; - /// \brief Specify if globals of a struct type containing bitfields should - /// have their alignment explicitly specified so as to ensure that LLVM uses - /// the correct alignment - bool EnforceBitfieldContainerAlignment; - public: IntType getSizeType() const { return SizeType; } IntType getIntMaxType() const { return IntMaxType; } @@ -459,11 +454,6 @@ public: return HasAlignMac68kSupport; } - /// \brief Check whether the alignment of bitfield struct should be enforced - bool enforceBitfieldContainerAlignment() const { - return EnforceBitfieldContainerAlignment; - } - /// \brief Return the user string for the specified integer type enum. /// /// For example, SignedShort -> "short". diff --git a/lib/Basic/TargetInfo.cpp b/lib/Basic/TargetInfo.cpp index cb6449f974..330258b025 100644 --- a/lib/Basic/TargetInfo.cpp +++ b/lib/Basic/TargetInfo.cpp @@ -75,7 +75,6 @@ TargetInfo::TargetInfo(const llvm::Triple &T) : TargetOpts(), Triple(T) { RegParmMax = 0; SSERegParmMax = 0; HasAlignMac68kSupport = false; - EnforceBitfieldContainerAlignment = false; // Default to no types using fpret. RealTypeUsesObjCFPRet = 0; diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp index 3d6f4f9594..047cf0d5b5 100644 --- a/lib/Basic/Targets.cpp +++ b/lib/Basic/Targets.cpp @@ -3983,9 +3983,6 @@ class ARMTargetInfo : public TargetInfo { ZeroLengthBitfieldBoundary = 0; - // Enforce the alignment of bitfield structs - EnforceBitfieldContainerAlignment = true; - // Thumb1 add sp, #imm requires the immediate value be multiple of 4, // so set preferred for small types to 32. if (T.isOSBinFormatMachO()) { @@ -4828,9 +4825,6 @@ public: UseBitFieldTypeAlignment = true; UseZeroLengthBitfieldAlignment = true; - // Enforce the alignment of bitfield structs - EnforceBitfieldContainerAlignment = true; - // AArch64 targets default to using the ARM C++ ABI. TheCXXABI.set(TargetCXXABI::GenericAArch64); } diff --git a/lib/CodeGen/CodeGenModule.cpp b/lib/CodeGen/CodeGenModule.cpp index 861a6ee164..c517d17666 100644 --- a/lib/CodeGen/CodeGenModule.cpp +++ b/lib/CodeGen/CodeGenModule.cpp @@ -1799,23 +1799,6 @@ CodeGenModule::GetOrCreateLLVMGlobal(StringRef MangledName, D->getType().isConstant(Context) && isExternallyVisible(D->getLinkageAndVisibility().getLinkage())) GV->setSection(".cp.rodata"); - - // The ARM/AArch64 ABI expects structs with bitfields to respect the proper - // container alignment, hence we have to enfore this in the IR so as to - // work around clang combining bitfields into one large type. - if (getContext().getTargetInfo().enforceBitfieldContainerAlignment()) { - if (const auto *RT = D->getType()->getAs()) { - const RecordDecl *RD = RT->getDecl(); - - for (auto I = RD->field_begin(), End = RD->field_end(); I != End; ++I) { - if ((*I)->isBitField()) { - const ASTRecordLayout &Info = getContext().getASTRecordLayout(RD); - GV->setAlignment(Info.getAlignment().getQuantity()); - break; - } - } - } - } } if (AddrSpace != Ty->getAddressSpace()) -- 2.40.0