From da67c6d0eff0c51b07a23138c640b8c4dfdccf1f Mon Sep 17 00:00:00 2001
From: Chen Zheng <shchenz@cn.ibm.com>
Date: Fri, 20 Jul 2018 13:00:47 +0000
Subject: [PATCH] [InstSimplify] fold srem instruction if its two operands are
 negated.

Differential Revision: https://reviews.llvm.org/D49423


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337545 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Analysis/InstructionSimplify.cpp |  4 ++++
 test/Transforms/InstSimplify/srem.ll | 36 +++++++++-------------------
 2 files changed, 15 insertions(+), 25 deletions(-)

diff --git a/lib/Analysis/InstructionSimplify.cpp b/lib/Analysis/InstructionSimplify.cpp
index 2eed5fc6418..e095e95935b 100644
--- a/lib/Analysis/InstructionSimplify.cpp
+++ b/lib/Analysis/InstructionSimplify.cpp
@@ -1109,6 +1109,10 @@ static Value *SimplifySRemInst(Value *Op0, Value *Op1, const SimplifyQuery &Q,
   if (match(Op1, m_SExt(m_Value(X))) && X->getType()->isIntOrIntVectorTy(1))
     return ConstantInt::getNullValue(Op0->getType());
 
+  // If the two operands are negated, return 0.
+  if (isKnownNegation(Op0, Op1))
+   return ConstantInt::getNullValue(Op0->getType());
+
   return simplifyRem(Instruction::SRem, Op0, Op1, Q, MaxRecurse);
 }
 
diff --git a/test/Transforms/InstSimplify/srem.ll b/test/Transforms/InstSimplify/srem.ll
index 40062ec6e31..c828d6d53ac 100644
--- a/test/Transforms/InstSimplify/srem.ll
+++ b/test/Transforms/InstSimplify/srem.ll
@@ -3,9 +3,7 @@
 
 define i32 @negated_operand(i32 %x) {
 ; CHECK-LABEL: @negated_operand(
-; CHECK-NEXT:    [[NEGX:%.*]] = sub i32 0, [[X:%.*]]
-; CHECK-NEXT:    [[REM:%.*]] = srem i32 [[NEGX]], [[X]]
-; CHECK-NEXT:    ret i32 [[REM]]
+; CHECK-NEXT:    ret i32 0
 ;
   %negx = sub i32 0, %x
   %rem = srem i32 %negx, %x
@@ -14,46 +12,36 @@ define i32 @negated_operand(i32 %x) {
 
 define <2 x i32> @negated_operand_commute_vec(<2 x i32> %x) {
 ; CHECK-LABEL: @negated_operand_commute_vec(
-; CHECK-NEXT:    [[NEGX:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
-; CHECK-NEXT:    [[REM:%.*]] = srem <2 x i32> [[NEGX]], [[X]]
-; CHECK-NEXT:    ret <2 x i32> [[REM]]
+; CHECK-NEXT:    ret <2 x i32> zeroinitializer
 ;
-  %negx = sub nsw <2 x i32> zeroinitializer, %x
+  %negx = sub <2 x i32> zeroinitializer, %x
   %rem = srem <2 x i32> %negx, %x
   ret <2 x i32> %rem
 }
 
 define i32 @knownnegation(i32 %x, i32 %y) {
 ; CHECK-LABEL: @knownnegation(
-; CHECK-NEXT:    [[XY:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT:    [[YX:%.*]] = sub nsw i32 [[Y]], [[X]]
-; CHECK-NEXT:    [[REM:%.*]] = srem i32 [[XY]], [[YX]]
-; CHECK-NEXT:    ret i32 [[REM]]
+; CHECK-NEXT:    ret i32 0
 ;
-  %xy = sub nsw i32 %x, %y
-  %yx = sub nsw i32 %y, %x
+  %xy = sub i32 %x, %y
+  %yx = sub i32 %y, %x
   %rem = srem i32 %xy, %yx
   ret i32 %rem
 }
 
 define <2 x i32> @knownnegation_commute_vec(<2 x i32> %x, <2 x i32> %y) {
 ; CHECK-LABEL: @knownnegation_commute_vec(
-; CHECK-NEXT:    [[XY:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT:    [[YX:%.*]] = sub nsw <2 x i32> [[Y]], [[X]]
-; CHECK-NEXT:    [[REM:%.*]] = srem <2 x i32> [[XY]], [[YX]]
-; CHECK-NEXT:    ret <2 x i32> [[REM]]
+; CHECK-NEXT:    ret <2 x i32> zeroinitializer
 ;
-  %xy = sub nsw <2 x i32> %x, %y
-  %yx = sub nsw <2 x i32> %y, %x
+  %xy = sub <2 x i32> %x, %y
+  %yx = sub <2 x i32> %y, %x
   %rem = srem <2 x i32> %xy, %yx
   ret <2 x i32> %rem
 }
 
 define <3 x i32> @negated_operand_vec_undef(<3 x i32> %x) {
 ; CHECK-LABEL: @negated_operand_vec_undef(
-; CHECK-NEXT:    [[NEGX:%.*]] = sub <3 x i32> <i32 0, i32 undef, i32 0>, [[X:%.*]]
-; CHECK-NEXT:    [[REM:%.*]] = srem <3 x i32> [[NEGX]], [[X]]
-; CHECK-NEXT:    ret <3 x i32> [[REM]]
+; CHECK-NEXT:    ret <3 x i32> zeroinitializer
 ;
   %negx = sub <3 x i32> <i32 0, i32 undef, i32 0>, %x
   %rem = srem <3 x i32> %negx, %x
@@ -73,9 +61,7 @@ define <2 x i32> @negated_operand_vec_nonsplat(<2 x i32> %x) {
 
 define i32 @negated_operand_commute(i32 %x) {
 ; CHECK-LABEL: @negated_operand_commute(
-; CHECK-NEXT:    [[NEGX:%.*]] = sub i32 0, [[X:%.*]]
-; CHECK-NEXT:    [[REM:%.*]] = srem i32 [[X]], [[NEGX]]
-; CHECK-NEXT:    ret i32 [[REM]]
+; CHECK-NEXT:    ret i32 0
 ;
   %negx = sub i32 0, %x
   %rem = srem i32 %x, %negx
-- 
2.50.1