From d9d2f4eb1fc55272b52a6284aea85fdbb7c3fff8 Mon Sep 17 00:00:00 2001 From: Nirav Dave Date: Mon, 19 Jun 2017 15:18:20 +0000 Subject: [PATCH] Add test for store merge with noimplicitfloat git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305697 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../AArch64/mergestores_noimplicitfloat.ll | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 test/CodeGen/AArch64/mergestores_noimplicitfloat.ll diff --git a/test/CodeGen/AArch64/mergestores_noimplicitfloat.ll b/test/CodeGen/AArch64/mergestores_noimplicitfloat.ll new file mode 100644 index 00000000000..74aeaf75d03 --- /dev/null +++ b/test/CodeGen/AArch64/mergestores_noimplicitfloat.ll @@ -0,0 +1,23 @@ +; RUN: llc -o - %s | FileCheck %s + +target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" +target triple = "arm64-apple-ios10.0.0" + +; PR33475 - Expect 64-bit operations as 128-operations are not legal + +; CHECK-LABEL: pr33475 +; CHECK-DAG: ldr [[R0:x[0-9]+]], [x1] +; CHECK-DAG: str [[R0]], [x0] +; CHECK-DAG: ldr [[R1:x[0-9]+]], [x1, #8] +; CHECK-DAG: str [[R1]], [x0, #8] +; CHECK-DAG: ldr [[R2:x[0-9]+]], [x1, #16] +; CHECK-DAG: str [[R2]], [x0, #16] +; CHECK-DAG: ldr [[R3:x[0-9]+]], [x1, #24] +; CHECK-DAG: str [[R3]], [x0, #24] + +define void @pr33475(i8* %p0, i8* %p1) noimplicitfloat { + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p0, i8* %p1, i64 32, i32 4, i1 false) + ret void +} + +declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i32, i1) -- 2.50.1