From d7e7e9c29d071047fab990c1e5b51fc5c424bc09 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Mon, 20 May 2019 16:22:11 +0000 Subject: [PATCH] R600: Fix unconditional return in loop git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361167 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp b/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp index ff21176a38f..9f1cb6582b5 100644 --- a/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp +++ b/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp @@ -56,17 +56,12 @@ using namespace llvm; #define DEBUG_TYPE "vec-merger" -static bool -isImplicitlyDef(MachineRegisterInfo &MRI, unsigned Reg) { - for (MachineRegisterInfo::def_instr_iterator It = MRI.def_instr_begin(Reg), - E = MRI.def_instr_end(); It != E; ++It) { - return (*It).isImplicitDef(); - } - if (MRI.isReserved(Reg)) { +static bool isImplicitlyDef(MachineRegisterInfo &MRI, unsigned Reg) { + assert(MRI.isSSA()); + if (TargetRegisterInfo::isPhysicalRegister(Reg)) return false; - } - llvm_unreachable("Reg without a def"); - return false; + const MachineInstr *MI = MRI.getUniqueVRegDef(Reg); + return MI && MI->isImplicitDef(); } namespace { -- 2.50.1