From d636a01807ee1925c85365b35c96b7a8d4fbadb1 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Sat, 5 Nov 2016 14:43:04 +0000 Subject: [PATCH] Strip trailing whitespace. NFCI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286034 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 43e3e9c4167..98727d0ffc0 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -21945,7 +21945,7 @@ static SDValue LowerMLOAD(SDValue Op, const X86Subtarget &Subtarget, SDValue Src0 = N->getSrc0(); Src0 = ExtendToType(Src0, WideDataVT, DAG); - // Mask element has to be i1 + // Mask element has to be i1. MVT MaskEltTy = Mask.getSimpleValueType().getScalarType(); assert((MaskEltTy == MVT::i1 || VT.getVectorNumElements() <= 4) && "We handle 4x32, 4x64 and 2x64 vectors only in this casse"); @@ -22001,7 +22001,7 @@ static SDValue LowerMSTORE(SDValue Op, const X86Subtarget &Subtarget, unsigned NumEltsInWideVec = 512/VT.getScalarSizeInBits(); MVT WideDataVT = MVT::getVectorVT(ScalarVT, NumEltsInWideVec); - // Mask element has to be i1 + // Mask element has to be i1. MVT MaskEltTy = Mask.getSimpleValueType().getScalarType(); assert((MaskEltTy == MVT::i1 || VT.getVectorNumElements() <= 4) && "We handle 4x32, 4x64 and 2x64 vectors only in this casse"); @@ -30020,7 +30020,7 @@ static SDValue combineMaskedStore(SDNode *N, SelectionDAG &DAG, if (Mst->isCompressingStore()) return SDValue(); - + if (!Mst->isTruncatingStore()) return reduceMaskedStoreToScalarStore(Mst, DAG); @@ -32858,7 +32858,7 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, return std::make_pair(0U, &X86::VK1WMRegClass); case MVT::i64: return std::make_pair(0U, &X86::VK64WMRegClass); - } + } } break; } -- 2.50.1