From d3fb1bcc0c732f422ef73404cce963ac9adce28e Mon Sep 17 00:00:00 2001 From: Quentin Colombet Date: Mon, 9 May 2016 22:37:05 +0000 Subject: [PATCH] [X86] Fix the AllRegs AVX calling convention. We used to list registers that were not in the AVX space. In other words, we were pushing registers that the ISA cannot encode (YMM16-YMM31). This is part of llvm.org/PR27481. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268983 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86CallingConv.td | 2 +- test/CodeGen/X86/x86-interrupt_vzeroupper.ll | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/Target/X86/X86CallingConv.td b/lib/Target/X86/X86CallingConv.td index 263a207a667..47e581fa1cd 100644 --- a/lib/Target/X86/X86CallingConv.td +++ b/lib/Target/X86/X86CallingConv.td @@ -897,7 +897,7 @@ def CSR_32_AllRegs_SSE : CalleeSavedRegs<(add CSR_32_AllRegs, def CSR_64_AllRegs : CalleeSavedRegs<(add CSR_64_MostRegs, RAX, RSP, (sequence "XMM%u", 16, 31))>; def CSR_64_AllRegs_AVX : CalleeSavedRegs<(sub (add CSR_64_MostRegs, RAX, RSP, - (sequence "YMM%u", 0, 31)), + (sequence "YMM%u", 0, 15)), (sequence "XMM%u", 0, 15))>; // Standard C + YMM6-15 diff --git a/test/CodeGen/X86/x86-interrupt_vzeroupper.ll b/test/CodeGen/X86/x86-interrupt_vzeroupper.ll index ab9f168d972..b735ae82bd5 100644 --- a/test/CodeGen/X86/x86-interrupt_vzeroupper.ll +++ b/test/CodeGen/X86/x86-interrupt_vzeroupper.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s +; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; Checks that interrupt handler code does not call "vzeroupper" instruction -- 2.50.1