From d1c6dad551b3162f56be1b066082a71ef9f0d9b2 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 25 Jan 2017 20:21:57 +0000 Subject: [PATCH] AMDGPU: Set call_convention bit in kernel_code_t According to the documentation this is supposed to be -1 if indirect calls are not supported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293081 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 5 +++++ test/CodeGen/AMDGPU/hsa.ll | 2 ++ test/MC/AMDGPU/hsa-exp.s | 2 +- test/MC/AMDGPU/hsa.s | 2 +- 4 files changed, 9 insertions(+), 2 deletions(-) diff --git a/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp index a24c44c8eb3..821f4e29ac7 100644 --- a/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp +++ b/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp @@ -127,6 +127,11 @@ void initDefaultAMDKernelCodeT(amd_kernel_code_t &Header, Header.kernel_code_entry_byte_offset = sizeof(Header); // wavefront_size is specified as a power of 2: 2^6 = 64 threads. Header.wavefront_size = 6; + + // If the code object does not support indirect functions, then the value must + // be 0xffffffff. + Header.call_convention = -1; + // These alignment values are specified in powers of two, so alignment = // 2^n. The minimum alignment is 2^4 = 16. Header.kernarg_segment_alignment = 4; diff --git a/test/CodeGen/AMDGPU/hsa.ll b/test/CodeGen/AMDGPU/hsa.ll index 12c15441c0f..972fbd66ef3 100644 --- a/test/CodeGen/AMDGPU/hsa.ll +++ b/test/CodeGen/AMDGPU/hsa.ll @@ -45,6 +45,8 @@ ; HSA: .amd_kernel_code_t ; HSA: enable_sgpr_private_segment_buffer = 1 ; HSA: enable_sgpr_kernarg_segment_ptr = 1 +; HSA: wavefront_size = 6 +; HSA: call_convention = -1 ; HSA: .end_amd_kernel_code_t ; HSA: s_load_dwordx2 s[{{[0-9]+:[0-9]+}}], s[4:5], 0x0 diff --git a/test/MC/AMDGPU/hsa-exp.s b/test/MC/AMDGPU/hsa-exp.s index 488afc5b400..cc5dfe82ff4 100644 --- a/test/MC/AMDGPU/hsa-exp.s +++ b/test/MC/AMDGPU/hsa-exp.s @@ -124,6 +124,6 @@ amd_kernel_code_t_minimal: // ASM: group_segment_alignment = 4 // ASM: private_segment_alignment = 4 // ASM: wavefront_size = 6 -// ASM: call_convention = 0 +// ASM: call_convention = -1 // ASM: runtime_loader_kernel_symbol = 0 // ASM: .end_amd_kernel_code_t diff --git a/test/MC/AMDGPU/hsa.s b/test/MC/AMDGPU/hsa.s index b428c817ea6..21083f3915d 100644 --- a/test/MC/AMDGPU/hsa.s +++ b/test/MC/AMDGPU/hsa.s @@ -273,6 +273,6 @@ amd_kernel_code_t_minimal: // ASM: group_segment_alignment = 4 // ASM: private_segment_alignment = 4 // ASM: wavefront_size = 6 -// ASM: call_convention = 0 +// ASM: call_convention = -1 // ASM: runtime_loader_kernel_symbol = 0 // ASM: .end_amd_kernel_code_t -- 2.40.0