From d1752d763fd0e8507cba140efff8619422b5ab33 Mon Sep 17 00:00:00 2001 From: Tim Northover Date: Wed, 25 Jan 2017 20:58:26 +0000 Subject: [PATCH] SDag: fix how initial loads are formed when splitting vector ops. Later code expects the vector loads produced to be directly concatenable, which means we shouldn't pad anything except the last load produced with UNDEF. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293088 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 5 ++++- test/CodeGen/ARM/vector-load.ll | 10 ++++++++++ 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp index df7846cb574..74740d1641a 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp @@ -3442,7 +3442,10 @@ SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVectorImpl &LdChain, LD->getPointerInfo().getWithOffset(Offset), MinAlign(Align, Increment), MMOFlags, AAInfo); LdChain.push_back(L.getValue(1)); - if (L->getValueType(0).isVector()) { + if (L->getValueType(0).isVector() && NewVTWidth >= LdWidth) { + // Later code assumes the vector loads produced will be mergeable, so we + // must pad the final entry up to the previous width. Scalars are + // combined separately. SmallVector Loads; Loads.push_back(L); unsigned size = L->getValueSizeInBits(0); diff --git a/test/CodeGen/ARM/vector-load.ll b/test/CodeGen/ARM/vector-load.ll index a638c2bdb9b..ed734723a86 100644 --- a/test/CodeGen/ARM/vector-load.ll +++ b/test/CodeGen/ARM/vector-load.ll @@ -251,3 +251,13 @@ define <4 x i32> @zextload_v8i8tov8i32_fake_update(<4 x i8>** %ptr) { %zlA = zext <4 x i8> %lA to <4 x i32> ret <4 x i32> %zlA } + +; CHECK-LABEL: test_silly_load: +; CHECK: ldr {{r[0-9]+}}, [r0, #24] +; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0:128]! +; CHECK: vldr d{{[0-9]+}}, [r0] + +define void @test_silly_load(<28 x i8>* %addr) { + load volatile <28 x i8>, <28 x i8>* %addr + ret void +} -- 2.40.0