From cfdef7caf1543118fb73fea6a29049b8a1c8c777 Mon Sep 17 00:00:00 2001 From: Matthias Braun Date: Fri, 20 Jan 2017 18:30:28 +0000 Subject: [PATCH] ARM: tLDR_postidx should be marked mayLoad This fixes -verify-machineinstrs complaints. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292629 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrThumb.td | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index a681f64b05e..b0bfae4d304 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -1477,7 +1477,7 @@ def : T1Pat<(extloadi16 t_addrmode_rr:$addr), (tLDRHr t_addrmode_rr:$addr)>; // post-inc LDR -> LDM r0!, {r1}. The way operands are layed out in LDMs is // different to how ISel expects them for a post-inc load, so use a pseudo // and expand it just after ISel. -let usesCustomInserter = 1, +let usesCustomInserter = 1, mayLoad =1, Constraints = "$Rn = $Rn_wb,@earlyclobber $Rn_wb" in def tLDR_postidx: tPseudoInst<(outs rGPR:$Rt, rGPR:$Rn_wb), (ins rGPR:$Rn, pred:$p), -- 2.40.0