From ce6571eae63cc7c429538056460d78826242724e Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Sat, 9 Sep 2017 17:52:44 +0000 Subject: [PATCH] [X86][MOVBE] Fix typo in MOVBE scheduling test names Copy+paste is not your friend git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312867 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/movbe-schedule.ll | 42 +++++++++++++++--------------- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/test/CodeGen/X86/movbe-schedule.ll b/test/CodeGen/X86/movbe-schedule.ll index 13f4dc5ff4b..efe5dcce477 100644 --- a/test/CodeGen/X86/movbe-schedule.ll +++ b/test/CodeGen/X86/movbe-schedule.ll @@ -8,14 +8,14 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1 -define i16 @test_ctlz_i16(i16 *%a0, i16 %a1, i16 *%a2) { -; GENERIC-LABEL: test_ctlz_i16: +define i16 @test_movbe_i16(i16 *%a0, i16 %a1, i16 *%a2) { +; GENERIC-LABEL: test_movbe_i16: ; GENERIC: # BB#0: ; GENERIC-NEXT: movbew (%rdi), %ax # sched: [5:0.50] ; GENERIC-NEXT: movbew %si, (%rdx) # sched: [1:1.00] ; GENERIC-NEXT: retq # sched: [1:1.00] ; -; ATOM-LABEL: test_ctlz_i16: +; ATOM-LABEL: test_movbe_i16: ; ATOM: # BB#0: ; ATOM-NEXT: movbew (%rdi), %ax # sched: [1:1.00] ; ATOM-NEXT: movbew %si, (%rdx) # sched: [1:1.00] @@ -25,25 +25,25 @@ define i16 @test_ctlz_i16(i16 *%a0, i16 %a1, i16 *%a2) { ; ATOM-NEXT: nop # sched: [1:0.50] ; ATOM-NEXT: retq # sched: [79:39.50] ; -; SLM-LABEL: test_ctlz_i16: +; SLM-LABEL: test_movbe_i16: ; SLM: # BB#0: ; SLM-NEXT: movbew (%rdi), %ax # sched: [4:1.00] ; SLM-NEXT: movbew %si, (%rdx) # sched: [1:1.00] ; SLM-NEXT: retq # sched: [4:1.00] ; -; HASWELL-LABEL: test_ctlz_i16: +; HASWELL-LABEL: test_movbe_i16: ; HASWELL: # BB#0: ; HASWELL-NEXT: movbew (%rdi), %ax # sched: [1:0.50] ; HASWELL-NEXT: movbew %si, (%rdx) # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [2:1.00] ; -; BTVER2-LABEL: test_ctlz_i16: +; BTVER2-LABEL: test_movbe_i16: ; BTVER2: # BB#0: ; BTVER2-NEXT: movbew (%rdi), %ax # sched: [4:1.00] ; BTVER2-NEXT: movbew %si, (%rdx) # sched: [1:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00] ; -; ZNVER1-LABEL: test_ctlz_i16: +; ZNVER1-LABEL: test_movbe_i16: ; ZNVER1: # BB#0: ; ZNVER1-NEXT: movbew (%rdi), %ax # sched: [5:0.50] ; ZNVER1-NEXT: movbew %si, (%rdx) # sched: [5:0.50] @@ -56,14 +56,14 @@ define i16 @test_ctlz_i16(i16 *%a0, i16 %a1, i16 *%a2) { } declare i16 @llvm.bswap.i16(i16) -define i32 @test_ctlz_i32(i32 *%a0, i32 %a1, i32 *%a2) { -; GENERIC-LABEL: test_ctlz_i32: +define i32 @test_movbe_i32(i32 *%a0, i32 %a1, i32 *%a2) { +; GENERIC-LABEL: test_movbe_i32: ; GENERIC: # BB#0: ; GENERIC-NEXT: movbel (%rdi), %eax # sched: [5:0.50] ; GENERIC-NEXT: movbel %esi, (%rdx) # sched: [1:1.00] ; GENERIC-NEXT: retq # sched: [1:1.00] ; -; ATOM-LABEL: test_ctlz_i32: +; ATOM-LABEL: test_movbe_i32: ; ATOM: # BB#0: ; ATOM-NEXT: movbel (%rdi), %eax # sched: [1:1.00] ; ATOM-NEXT: movbel %esi, (%rdx) # sched: [1:1.00] @@ -73,25 +73,25 @@ define i32 @test_ctlz_i32(i32 *%a0, i32 %a1, i32 *%a2) { ; ATOM-NEXT: nop # sched: [1:0.50] ; ATOM-NEXT: retq # sched: [79:39.50] ; -; SLM-LABEL: test_ctlz_i32: +; SLM-LABEL: test_movbe_i32: ; SLM: # BB#0: ; SLM-NEXT: movbel (%rdi), %eax # sched: [4:1.00] ; SLM-NEXT: movbel %esi, (%rdx) # sched: [1:1.00] ; SLM-NEXT: retq # sched: [4:1.00] ; -; HASWELL-LABEL: test_ctlz_i32: +; HASWELL-LABEL: test_movbe_i32: ; HASWELL: # BB#0: ; HASWELL-NEXT: movbel (%rdi), %eax # sched: [1:0.50] ; HASWELL-NEXT: movbel %esi, (%rdx) # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [2:1.00] ; -; BTVER2-LABEL: test_ctlz_i32: +; BTVER2-LABEL: test_movbe_i32: ; BTVER2: # BB#0: ; BTVER2-NEXT: movbel (%rdi), %eax # sched: [4:1.00] ; BTVER2-NEXT: movbel %esi, (%rdx) # sched: [1:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00] ; -; ZNVER1-LABEL: test_ctlz_i32: +; ZNVER1-LABEL: test_movbe_i32: ; ZNVER1: # BB#0: ; ZNVER1-NEXT: movbel (%rdi), %eax # sched: [5:0.50] ; ZNVER1-NEXT: movbel %esi, (%rdx) # sched: [5:0.50] @@ -104,14 +104,14 @@ define i32 @test_ctlz_i32(i32 *%a0, i32 %a1, i32 *%a2) { } declare i32 @llvm.bswap.i32(i32) -define i64 @test_ctlz_i64(i64 *%a0, i64 %a1, i64 *%a2) { -; GENERIC-LABEL: test_ctlz_i64: +define i64 @test_movbe_i64(i64 *%a0, i64 %a1, i64 *%a2) { +; GENERIC-LABEL: test_movbe_i64: ; GENERIC: # BB#0: ; GENERIC-NEXT: movbeq (%rdi), %rax # sched: [5:0.50] ; GENERIC-NEXT: movbeq %rsi, (%rdx) # sched: [1:1.00] ; GENERIC-NEXT: retq # sched: [1:1.00] ; -; ATOM-LABEL: test_ctlz_i64: +; ATOM-LABEL: test_movbe_i64: ; ATOM: # BB#0: ; ATOM-NEXT: movbeq (%rdi), %rax # sched: [1:1.00] ; ATOM-NEXT: movbeq %rsi, (%rdx) # sched: [1:1.00] @@ -121,25 +121,25 @@ define i64 @test_ctlz_i64(i64 *%a0, i64 %a1, i64 *%a2) { ; ATOM-NEXT: nop # sched: [1:0.50] ; ATOM-NEXT: retq # sched: [79:39.50] ; -; SLM-LABEL: test_ctlz_i64: +; SLM-LABEL: test_movbe_i64: ; SLM: # BB#0: ; SLM-NEXT: movbeq (%rdi), %rax # sched: [4:1.00] ; SLM-NEXT: movbeq %rsi, (%rdx) # sched: [1:1.00] ; SLM-NEXT: retq # sched: [4:1.00] ; -; HASWELL-LABEL: test_ctlz_i64: +; HASWELL-LABEL: test_movbe_i64: ; HASWELL: # BB#0: ; HASWELL-NEXT: movbeq (%rdi), %rax # sched: [1:0.50] ; HASWELL-NEXT: movbeq %rsi, (%rdx) # sched: [1:1.00] ; HASWELL-NEXT: retq # sched: [2:1.00] ; -; BTVER2-LABEL: test_ctlz_i64: +; BTVER2-LABEL: test_movbe_i64: ; BTVER2: # BB#0: ; BTVER2-NEXT: movbeq (%rdi), %rax # sched: [4:1.00] ; BTVER2-NEXT: movbeq %rsi, (%rdx) # sched: [1:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00] ; -; ZNVER1-LABEL: test_ctlz_i64: +; ZNVER1-LABEL: test_movbe_i64: ; ZNVER1: # BB#0: ; ZNVER1-NEXT: movbeq (%rdi), %rax # sched: [5:0.50] ; ZNVER1-NEXT: movbeq %rsi, (%rdx) # sched: [5:0.50] -- 2.50.1