From cd5b3fa3e75b54b04a3ef6ce5229f1c6b0d6b2b8 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Thu, 17 Nov 2016 19:03:05 +0000 Subject: [PATCH] Fix spelling mistakes in X86 target comments. NFC. Identified by Pedro Giffuni in PR27636. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287247 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86FrameLowering.cpp | 2 +- lib/Target/X86/X86ISelLowering.cpp | 2 +- lib/Target/X86/X86OptimizeLEAs.cpp | 6 +++--- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/lib/Target/X86/X86FrameLowering.cpp b/lib/Target/X86/X86FrameLowering.cpp index 9bba0906575..ff428f33b56 100644 --- a/lib/Target/X86/X86FrameLowering.cpp +++ b/lib/Target/X86/X86FrameLowering.cpp @@ -615,7 +615,7 @@ void X86FrameLowering::emitStackProbeInline(MachineFunction &MF, // lowest touched page on the stack, not the point at which the OS // will cause an overflow exception, so this is just an optimization // to avoid unnecessarily touching pages that are below the current - // SP but already commited to the stack by the OS. + // SP but already committed to the stack by the OS. BuildMI(&MBB, DL, TII.get(X86::MOV64rm), LimitReg) .addReg(0) .addImm(1) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 5226570ea33..4660a5dd3b7 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -31148,7 +31148,7 @@ static SDValue lowerX86FPLogicOp(SDNode *N, SelectionDAG &DAG, const X86Subtarget &Subtarget) { EVT VT = N->getValueType(0); if (VT.is512BitVector() && !Subtarget.hasDQI()) { - // VXORPS, VORPS, VANDPS, VANDNPS are supported only under DQ extention. + // VXORPS, VORPS, VANDPS, VANDNPS are supported only under DQ extension. // These logic operations may be executed in the integer domain. SDLoc dl(N); diff --git a/lib/Target/X86/X86OptimizeLEAs.cpp b/lib/Target/X86/X86OptimizeLEAs.cpp index 943f7530019..e1447006cd1 100644 --- a/lib/Target/X86/X86OptimizeLEAs.cpp +++ b/lib/Target/X86/X86OptimizeLEAs.cpp @@ -235,7 +235,7 @@ private: /// \brief Choose the best \p LEA instruction from the \p List to replace /// address calculation in \p MI instruction. Return the address displacement - /// and the distance between \p MI and the choosen \p BestLEA in + /// and the distance between \p MI and the chosen \p BestLEA in /// \p AddrDispShift and \p Dist. bool chooseBestLEA(const SmallVectorImpl &List, const MachineInstr &MI, MachineInstr *&BestLEA, @@ -549,10 +549,10 @@ bool OptimizeLEAPass::removeRedundantLEAs(MemOpMap &LEAs) { MachineInstr &Last = **I2; int64_t AddrDispShift; - // LEAs should be in occurence order in the list, so we can freely + // LEAs should be in occurrence order in the list, so we can freely // replace later LEAs with earlier ones. assert(calcInstrDist(First, Last) > 0 && - "LEAs must be in occurence order in the list"); + "LEAs must be in occurrence order in the list"); // Check that the Last LEA instruction can be replaced by the First. if (!isReplaceable(First, Last, AddrDispShift)) { -- 2.50.1