From ccfb6f1d2d2ec37c38a5583d63a8a7974d032c59 Mon Sep 17 00:00:00 2001 From: Alexey Bataev Date: Tue, 18 Dec 2018 19:20:15 +0000 Subject: [PATCH] [OPENMP][NVPTX]Added extra sync point to the inter-warp copy function. The parallel reduction operation requires an extra synchronization point in the inter-warp copy function to avoid divergence. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@349525 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 5 +++++ test/OpenMP/nvptx_target_parallel_reduction_codegen.cpp | 4 ++++ 2 files changed, 9 insertions(+) diff --git a/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp b/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp index b055132ef0..59086d219b 100644 --- a/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp +++ b/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp @@ -3089,6 +3089,7 @@ static void emitReductionListCopy( /// void inter_warp_copy_func(void* reduce_data, num_warps) /// shared smem[warp_size]; /// For all data entries D in reduce_data: +/// sync /// If (I am the first lane in each warp) /// Copy my local D to smem[warp_id] /// sync @@ -3203,6 +3204,10 @@ static llvm::Value *emitInterWarpCopyFunction(CodeGenModule &CGM, Bld.CreateCondBr(Cmp, BodyBB, ExitBB); CGF.EmitBlock(BodyBB); } + // kmpc_barrier. + CGM.getOpenMPRuntime().emitBarrierCall(CGF, Loc, OMPD_unknown, + /*EmitChecks=*/false, + /*ForceSimpleCall=*/true); llvm::BasicBlock *ThenBB = CGF.createBasicBlock("then"); llvm::BasicBlock *ElseBB = CGF.createBasicBlock("else"); llvm::BasicBlock *MergeBB = CGF.createBasicBlock("ifcont"); diff --git a/test/OpenMP/nvptx_target_parallel_reduction_codegen.cpp b/test/OpenMP/nvptx_target_parallel_reduction_codegen.cpp index dd93b0c1b9..34ad93b695 100644 --- a/test/OpenMP/nvptx_target_parallel_reduction_codegen.cpp +++ b/test/OpenMP/nvptx_target_parallel_reduction_codegen.cpp @@ -190,6 +190,7 @@ int bar(int n){ // CHECK: [[CNT:%.+]] = load i32, i32* [[CNT_ADDR]], // CHECK: [[DONE_COPY:%.+]] = icmp ult i32 [[CNT]], 2 // CHECK: br i1 [[DONE_COPY]], label + // CHECK: call void @__kmpc_barrier(%struct.ident_t* @ // CHECK: [[IS_WARP_MASTER:%.+]] = icmp eq i32 [[LANEID]], 0 // CHECK: br i1 [[IS_WARP_MASTER]], label {{%?}}[[DO_COPY:.+]], label {{%?}}[[COPY_ELSE:.+]] // @@ -427,6 +428,7 @@ int bar(int n){ // CHECK-DAG: [[LANEID:%.+]] = and i32 {{.+}}, 31 // CHECK-DAG: [[WARPID:%.+]] = ashr i32 {{.+}}, 5 // CHECK-DAG: [[RED_LIST:%.+]] = bitcast i8* {{.+}} to [[RLT]]* + // CHECK: call void @__kmpc_barrier(%struct.ident_t* @ // CHECK: [[IS_WARP_MASTER:%.+]] = icmp eq i32 [[LANEID]], 0 // CHECK: br i1 [[IS_WARP_MASTER]], label {{%?}}[[DO_COPY:.+]], label {{%?}}[[COPY_ELSE:.+]] // @@ -466,6 +468,7 @@ int bar(int n){ // // CHECK: [[READ_CONT]] // CHECK: call void @__kmpc_barrier(%struct.ident_t* @ + // CHECK: call void @__kmpc_barrier(%struct.ident_t* @ // CHECK: [[IS_WARP_MASTER:%.+]] = icmp eq i32 [[LANEID]], 0 // CHECK: br i1 [[IS_WARP_MASTER]], label {{%?}}[[DO_COPY:.+]], label {{%?}}[[COPY_ELSE:.+]] // @@ -740,6 +743,7 @@ int bar(int n){ // CHECK-DAG: [[LANEID:%.+]] = and i32 {{.+}}, 31 // CHECK-DAG: [[WARPID:%.+]] = ashr i32 {{.+}}, 5 // CHECK-DAG: [[RED_LIST:%.+]] = bitcast i8* {{.+}} to [[RLT]]* + // CHECK: call void @__kmpc_barrier(%struct.ident_t* @ // CHECK: [[IS_WARP_MASTER:%.+]] = icmp eq i32 [[LANEID]], 0 // CHECK: br i1 [[IS_WARP_MASTER]], label {{%?}}[[DO_COPY:.+]], label {{%?}}[[COPY_ELSE:.+]] // -- 2.40.0