From cc89aa77e988b1c4e70f1db467b4fa903ab039bc Mon Sep 17 00:00:00 2001 From: Alexandros Lamprineas Date: Fri, 27 Sep 2019 08:22:24 +0000 Subject: [PATCH] [MC][ARM] vscclrm disassembles as vldmia Happens only when the mve.fp subtarget feature is enabled: $ llvm-mc -triple thumbv8.1m.main -mattr=+mve.fp,+8msecext -disassemble <<< "0x9f,0xec,0x08,0x0b" .text vldmia pc, {d0, d1, d2, d3} $ llvm-mc -triple thumbv8.1m.main -mattr=+8msecext -disassemble <<< "0x9f,0xec,0x08,0x0b" .text vscclrm {d0, d1, d2, d3, vpr} Assembling returns the correct encoding with or without mve.fp: $ llvm-mc -triple thumbv8.1m.main -mattr=+mve.fp,+8msecext -show-encoding <<< "vscclrm {d0-d3, vpr}" .text vscclrm {d0, d1, d2, d3, vpr} @ encoding: [0x9f,0xec,0x08,0x0b] $ llvm-mc -triple thumbv8.1m.main -mattr=+8msecext -show-encoding <<< "vscclrm {d0-d3, vpr}" .text vscclrm {d0, d1, d2, d3, vpr} @ encoding: [0x9f,0xec,0x08,0x0b] The problem seems to be in the TableGen description of VSCCLRMD. The least significant bit should be set to zero. Differential Revision: https://reviews.llvm.org/D68025 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@373052 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrVFP.td | 3 ++- test/MC/ARM/vscclrm-asm.s | 6 ++++++ test/MC/Disassembler/ARM/vscclrm.txt | 5 ++++- 3 files changed, 12 insertions(+), 2 deletions(-) diff --git a/lib/Target/ARM/ARMInstrVFP.td b/lib/Target/ARM/ARMInstrVFP.td index 13351f23939..4a95630ab7e 100644 --- a/lib/Target/ARM/ARMInstrVFP.td +++ b/lib/Target/ARM/ARMInstrVFP.td @@ -2618,7 +2618,8 @@ def VSCCLRMD : VFPXI<(outs), (ins pred:$p, fp_dreglist_with_vpr:$regs, variable_ let Inst{21-16} = 0b011111; let Inst{15-12} = regs{11-8}; let Inst{11-8} = 0b1011; - let Inst{7-0} = regs{7-0}; + let Inst{7-1} = regs{7-1}; + let Inst{0} = 0; let DecoderMethod = "DecodeVSCCLRM"; diff --git a/test/MC/ARM/vscclrm-asm.s b/test/MC/ARM/vscclrm-asm.s index d86de90f849..3f679c7fdd0 100644 --- a/test/MC/ARM/vscclrm-asm.s +++ b/test/MC/ARM/vscclrm-asm.s @@ -1,6 +1,9 @@ // RUN: not llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+8msecext -show-encoding < %s 2>%t \ // RUN: | FileCheck --check-prefix=CHECK %s // RUN: FileCheck --check-prefix=ERROR < %t %s +// RUN: not llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+mve.fp,+8msecext -show-encoding < %s 2>%t \ +// RUN: | FileCheck --check-prefix=CHECK %s +// RUN: FileCheck --check-prefix=ERROR < %t %s // RUN: not llvm-mc -triple=thumbv8.1m.main-arm-none-eabi -mattr=-8msecext < %s 2>%t // RUN: FileCheck --check-prefix=NOSEC < %t %s @@ -21,6 +24,9 @@ vscclrm {s31, vpr} // CHECK: vscclrm {d0, d1, vpr} @ encoding: [0x9f,0xec,0x04,0x0b] vscclrm {d0-d1, vpr} +// CHECK: vscclrm {d0, d1, d2, d3, vpr} @ encoding: [0x9f,0xec,0x08,0x0b] +vscclrm {d0-d3, vpr} + // CHECK: vscclrm {d5, d6, d7, vpr} @ encoding: [0x9f,0xec,0x06,0x5b] vscclrm {d5-d7, vpr} diff --git a/test/MC/Disassembler/ARM/vscclrm.txt b/test/MC/Disassembler/ARM/vscclrm.txt index 7c162d65515..8a89cfb76e4 100644 --- a/test/MC/Disassembler/ARM/vscclrm.txt +++ b/test/MC/Disassembler/ARM/vscclrm.txt @@ -1,5 +1,5 @@ # RUN: llvm-mc -disassemble -triple=thumbv8.1m.main-none-eabi -mattr=+8msecext -show-encoding %s 2>&1 | FileCheck %s - +# RUN: llvm-mc -disassemble -triple=thumbv8.1m.main-none-eabi -mattr=+mve.fp,+8msecext -show-encoding %s 2>&1 | FileCheck %s [0x9f 0xec 0x04 0x0a] # CHECK: vscclrm {s0, s1, s2, s3, vpr} @@ -16,6 +16,9 @@ [0x9f,0xec,0x04,0x0b] # CHECK: vscclrm {d0, d1, vpr} @ encoding: [0x9f,0xec,0x04,0x0b] +[0x9f,0xec,0x08,0x0b] +# CHECK: vscclrm {d0, d1, d2, d3, vpr} @ encoding: [0x9f,0xec,0x08,0x0b] + [0x9f,0xec,0x06,0x5b] # CHECK: vscclrm {d5, d6, d7, vpr} @ encoding: [0x9f,0xec,0x06,0x5b] -- 2.50.1