From cb1b1b8fef8dbf8de7ec0217bc969405b8df68ac Mon Sep 17 00:00:00 2001
From: Jerome Jiang <jianj@google.com>
Date: Wed, 2 Nov 2016 09:55:49 -0700
Subject: [PATCH] Change C and msa to match results from sse2.

Re-enable the tests to check CvsAssembly.
BUG=webm:1321

Change-Id: Id7f7d74b06c469fb6c8f5d04e91359e9cd9097a6
---
 test/pp_filter_test.cc     | 9 ++++++++-
 vpx_dsp/deblock.c          | 4 +---
 vpx_dsp/mips/deblock_msa.c | 3 +--
 3 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/test/pp_filter_test.cc b/test/pp_filter_test.cc
index 23e0ffbee..644388550 100644
--- a/test/pp_filter_test.cc
+++ b/test/pp_filter_test.cc
@@ -272,7 +272,7 @@ TEST_P(VpxMbPostProcDownTest, CheckFilterOutput) {
   delete[] c_mem;
 }
 
-TEST_P(VpxMbPostProcDownTest, DISABLED_CheckCvsAssembly) {
+TEST_P(VpxMbPostProcDownTest, CheckCvsAssembly) {
   const int rows = 16;
   const int cols = 16;
   const int src_pitch = cols;
@@ -308,6 +308,10 @@ INSTANTIATE_TEST_CASE_P(
 
 INSTANTIATE_TEST_CASE_P(C, VpxMbPostProcAcrossIpTest,
                         ::testing::Values(vpx_mbpost_proc_across_ip_c));
+
+INSTANTIATE_TEST_CASE_P(C, VpxMbPostProcDownTest,
+                        ::testing::Values(vpx_mbpost_proc_down_c));
+
 #if HAVE_SSE2
 INSTANTIATE_TEST_CASE_P(
     SSE2, VpxPostProcDownAndAcrossMbRowTest,
@@ -327,6 +331,9 @@ INSTANTIATE_TEST_CASE_P(
 
 INSTANTIATE_TEST_CASE_P(MSA, VpxMbPostProcAcrossIpTest,
                         ::testing::Values(vpx_mbpost_proc_across_ip_msa));
+
+INSTANTIATE_TEST_CASE_P(MSA, VpxMbPostProcDownTest,
+                        ::testing::Values(vpx_mbpost_proc_down_msa));
 #endif
 
 }  // namespace
diff --git a/vpx_dsp/deblock.c b/vpx_dsp/deblock.c
index 589b124e2..b2d94795d 100644
--- a/vpx_dsp/deblock.c
+++ b/vpx_dsp/deblock.c
@@ -156,14 +156,12 @@ void vpx_mbpost_proc_across_ip_c(unsigned char *src, int pitch, int rows,
 void vpx_mbpost_proc_down_c(unsigned char *dst, int pitch, int rows, int cols,
                             int flimit) {
   int r, c, i;
-  const int16_t *rv3 = &vpx_rv[63 & rand()];
 
   for (c = 0; c < cols; c++) {
     unsigned char *s = &dst[c];
     int sumsq = 0;
     int sum = 0;
     unsigned char d[16];
-    const int16_t *rv2 = rv3 + ((c * 17) & 127);
 
     for (i = -8; i < 0; i++) s[i * pitch] = s[0];
 
@@ -183,7 +181,7 @@ void vpx_mbpost_proc_down_c(unsigned char *dst, int pitch, int rows, int cols,
       d[r & 15] = s[0];
 
       if (sumsq * 15 - sum * sum < flimit) {
-        d[r & 15] = (rv2[r & 127] + sum + s[0]) >> 4;
+        d[r & 15] = (vpx_rv[(r & 127) + (c & 7)] + sum + s[0]) >> 4;
       }
       if (r >= 8) s[-8 * pitch] = d[(r - 8) & 15];
       s += pitch;
diff --git a/vpx_dsp/mips/deblock_msa.c b/vpx_dsp/mips/deblock_msa.c
index cc633c669..ba52e8095 100644
--- a/vpx_dsp/mips/deblock_msa.c
+++ b/vpx_dsp/mips/deblock_msa.c
@@ -573,7 +573,6 @@ void vpx_mbpost_proc_across_ip_msa(uint8_t *src_ptr, int32_t pitch,
 void vpx_mbpost_proc_down_msa(uint8_t *dst_ptr, int32_t pitch, int32_t rows,
                               int32_t cols, int32_t flimit) {
   int32_t row, col, cnt, i;
-  const int16_t *rv3 = &vpx_rv[63 & rand()];
   v4i32 flimit_vec;
   v16u8 dst7, dst8, dst_r_b, dst_l_b;
   v16i8 mask;
@@ -601,7 +600,7 @@ void vpx_mbpost_proc_down_msa(uint8_t *dst_ptr, int32_t pitch, int32_t rows,
 
     dst = LD_UB(dst_tmp);
     for (cnt = (col << 4), i = 0; i < 16; ++cnt) {
-      rv2[i] = rv3 + ((cnt * 17) & 127);
+      rv2[i] = vpx_rv + (i & 7);
       ++i;
     }
     for (cnt = -8; cnt < 0; ++cnt) {
-- 
2.40.0