From caed319d5118abcf410fa9b8bdd47b236938da83 Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Sat, 22 Apr 2017 14:31:28 +0000 Subject: [PATCH] [globalisel][tablegen] Fix PR32733 by checking which instruction operands belong to. canMutate() was returning true when the operands were all in the same order as the matched instruction. However, it wasn't checking the operands were actually on that instruction. This worked when we could only match a single instruction but the addition of nested instruction matching led to cases where the operands could be split across multiple instructions. canMutate() now returns false if operands belong to instructions other than the root of the match. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301077 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../AArch64/GlobalISel/select-pr32733.mir | 65 +++++++++++++++++++ utils/TableGen/GlobalISelEmitter.cpp | 5 +- 2 files changed, 68 insertions(+), 2 deletions(-) create mode 100644 test/CodeGen/AArch64/GlobalISel/select-pr32733.mir diff --git a/test/CodeGen/AArch64/GlobalISel/select-pr32733.mir b/test/CodeGen/AArch64/GlobalISel/select-pr32733.mir new file mode 100644 index 00000000000..96436209451 --- /dev/null +++ b/test/CodeGen/AArch64/GlobalISel/select-pr32733.mir @@ -0,0 +1,65 @@ +# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s + +--- | + define i32 @main() { + entry: + ret i32 0 + } + + declare i32 @printf(i8*, ...) +... +--- +# CHECK-LABEL: name: main +name: main +alignment: 2 +exposesReturnsTwice: false +noVRegs: false +legalized: true +regBankSelected: true +selected: false +tracksRegLiveness: true +registers: + - { id: 0, class: gpr } + - { id: 1, class: gpr } + - { id: 2, class: gpr } + - { id: 3, class: gpr } + - { id: 4, class: gpr } + - { id: 5, class: gpr } + - { id: 6, class: gpr } + - { id: 7, class: gpr } + - { id: 8, class: gpr } + - { id: 9, class: gpr } + - { id: 10, class: gpr } + - { id: 11, class: gpr } + - { id: 12, class: gpr } + - { id: 13, class: gpr } + - { id: 14, class: gpr } + - { id: 15, class: gpr } +frameInfo: + isFrameAddressTaken: false + isReturnAddressTaken: false + hasStackMap: false + hasPatchPoint: false + stackSize: 0 + offsetAdjustment: 0 + maxAlignment: 8 + adjustsStack: false + hasCalls: true + maxCallFrameSize: 0 + hasOpaqueSPAdjustment: false + hasVAStart: false + hasMustTailInVarArgFunc: false +# CHECK: body: +# CHECK: %1 = COPY %w0 +# CHECK-NOT: %2 = ORNWrr %wzr, %1 +# CHECK: %4 = EONWrr %1, %3 +body: | + bb.1.entry: + liveins: %w0 + %0(s32) = G_CONSTANT i32 -1 + %3(s32) = G_CONSTANT i32 1 + %1(s32) = COPY %w0 + %2(s32) = G_XOR %1, %0 + %4(s32) = G_XOR %2, %3 + %w0 = COPY %4(s32) +... diff --git a/utils/TableGen/GlobalISelEmitter.cpp b/utils/TableGen/GlobalISelEmitter.cpp index 0c77167d4cc..488bf8d312b 100644 --- a/utils/TableGen/GlobalISelEmitter.cpp +++ b/utils/TableGen/GlobalISelEmitter.cpp @@ -1014,8 +1014,9 @@ private: bool canMutate() const { for (const auto &Renderer : enumerate(OperandRenderers)) { if (const auto *Copy = dyn_cast(&*Renderer.value())) { - if (Matched.getOperand(Copy->getSymbolicName()).getOperandIndex() != - Renderer.index()) + const OperandMatcher &OM = Matched.getOperand(Copy->getSymbolicName()); + if (&Matched != &OM.getInstructionMatcher() || + OM.getOperandIndex() != Renderer.index()) return false; } else return false; -- 2.40.0