From c97d8c24823b4bb60b05fea808b173c998efeece Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Tue, 20 Aug 2019 13:25:55 +0000 Subject: [PATCH] [X86][FMA] Add FMA 'negated expression' combine tests for D63141 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@369384 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/fma-fneg-combine-2.ll | 89 ++++++++++++++++++++++++++ 1 file changed, 89 insertions(+) create mode 100644 test/CodeGen/X86/fma-fneg-combine-2.ll diff --git a/test/CodeGen/X86/fma-fneg-combine-2.ll b/test/CodeGen/X86/fma-fneg-combine-2.ll new file mode 100644 index 00000000000..1f520f9a398 --- /dev/null +++ b/test/CodeGen/X86/fma-fneg-combine-2.ll @@ -0,0 +1,89 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx,fma | FileCheck %s --check-prefixes=CHECK,FMA3 +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx,fma4 | FileCheck %s --check-prefixes=CHECK,FMA4 + +define float @test_fneg_fma_subx_y_negz_f32(float %w, float %x, float %y, float %z) { +; FMA3-LABEL: test_fneg_fma_subx_y_negz_f32: +; FMA3: # %bb.0: # %entry +; FMA3-NEXT: vsubss %xmm1, %xmm0, %xmm0 +; FMA3-NEXT: vfnmadd213ss {{.*#+}} xmm0 = -(xmm2 * xmm0) + xmm3 +; FMA3-NEXT: retq +; +; FMA4-LABEL: test_fneg_fma_subx_y_negz_f32: +; FMA4: # %bb.0: # %entry +; FMA4-NEXT: vsubss %xmm1, %xmm0, %xmm0 +; FMA4-NEXT: vfnmaddss %xmm3, %xmm2, %xmm0, %xmm0 +; FMA4-NEXT: retq +entry: + %subx = fsub nsz float %w, %x + %negz = fsub float -0.000000e+00, %z + %0 = tail call nsz float @llvm.fma.f32(float %subx, float %y, float %negz) + %1 = fsub float -0.000000e+00, %0 + ret float %1 +} + +define float @test_fneg_fma_x_suby_negz_f32(float %w, float %x, float %y, float %z) { +; FMA3-LABEL: test_fneg_fma_x_suby_negz_f32: +; FMA3: # %bb.0: # %entry +; FMA3-NEXT: vsubss %xmm2, %xmm0, %xmm0 +; FMA3-NEXT: vfnmadd213ss {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm3 +; FMA3-NEXT: retq +; +; FMA4-LABEL: test_fneg_fma_x_suby_negz_f32: +; FMA4: # %bb.0: # %entry +; FMA4-NEXT: vsubss %xmm2, %xmm0, %xmm0 +; FMA4-NEXT: vfnmaddss %xmm3, %xmm0, %xmm1, %xmm0 +; FMA4-NEXT: retq +entry: + %suby = fsub nsz float %w, %y + %negz = fsub float -0.000000e+00, %z + %0 = tail call nsz float @llvm.fma.f32(float %x, float %suby, float %negz) + %1 = fsub float -0.000000e+00, %0 + ret float %1 +} + +define float @test_fneg_fma_subx_suby_negz_f32(float %w, float %x, float %y, float %z) { +; FMA3-LABEL: test_fneg_fma_subx_suby_negz_f32: +; FMA3: # %bb.0: # %entry +; FMA3-NEXT: vsubss %xmm1, %xmm0, %xmm1 +; FMA3-NEXT: vsubss %xmm2, %xmm0, %xmm0 +; FMA3-NEXT: vfnmadd213ss {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm3 +; FMA3-NEXT: retq +; +; FMA4-LABEL: test_fneg_fma_subx_suby_negz_f32: +; FMA4: # %bb.0: # %entry +; FMA4-NEXT: vsubss %xmm1, %xmm0, %xmm1 +; FMA4-NEXT: vsubss %xmm2, %xmm0, %xmm0 +; FMA4-NEXT: vfnmaddss %xmm3, %xmm0, %xmm1, %xmm0 +; FMA4-NEXT: retq +entry: + %subx = fsub nsz float %w, %x + %suby = fsub nsz float %w, %y + %negz = fsub float -0.000000e+00, %z + %0 = tail call nsz float @llvm.fma.f32(float %subx, float %suby, float %negz) + %1 = fsub float -0.000000e+00, %0 + ret float %1 +} + +define float @test_fneg_fma_subx_negy_negz_f32(float %w, float %x, float %y, float %z) { +; FMA3-LABEL: test_fneg_fma_subx_negy_negz_f32: +; FMA3: # %bb.0: # %entry +; FMA3-NEXT: vsubss %xmm1, %xmm0, %xmm0 +; FMA3-NEXT: vfmadd213ss {{.*#+}} xmm0 = (xmm2 * xmm0) + xmm3 +; FMA3-NEXT: retq +; +; FMA4-LABEL: test_fneg_fma_subx_negy_negz_f32: +; FMA4: # %bb.0: # %entry +; FMA4-NEXT: vsubss %xmm1, %xmm0, %xmm0 +; FMA4-NEXT: vfmaddss %xmm3, %xmm2, %xmm0, %xmm0 +; FMA4-NEXT: retq +entry: + %subx = fsub nsz float %w, %x + %negy = fsub float -0.000000e+00, %y + %negz = fsub float -0.000000e+00, %z + %0 = tail call nsz float @llvm.fma.f32(float %subx, float %negy, float %negz) + %1 = fsub float -0.000000e+00, %0 + ret float %1 +} + +declare float @llvm.fma.f32(float, float, float) -- 2.40.0