From c94fa3d72dd3976ac07091dd97fff748b7992faf Mon Sep 17 00:00:00 2001 From: Sanjay Patel Date: Tue, 20 Aug 2019 20:51:50 +0000 Subject: [PATCH] [InstCombine] add tests for mismatched cast ops for icmp; NFC Motivating case is shown in PR42700: https://bugs.llvm.org/show_bug.cgi?id=42700 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@369439 91177308-0d34-0410-b5e6-96231b3b80d8 --- ...004-11-27-SetCCForCastLargerAndConstant.ll | 208 ++++++++++++++++-- 1 file changed, 190 insertions(+), 18 deletions(-) diff --git a/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll b/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll index 6a95c82374d..934d981d81b 100644 --- a/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll +++ b/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll @@ -1,6 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; This test case tests the InstructionCombining optimization that -; reduces things like: +; RUN: opt < %s -instcombine -S | FileCheck %s + +; This tests the InstructionCombining optimization that reduces things like: ; %Y = sext i8 %X to i32 ; %C = icmp ult i32 %Y, 1024 ; to @@ -10,12 +11,11 @@ ; be eliminated. In many cases the setCC is also eliminated based on the ; constant value and the range of the casted value. ; -; RUN: opt < %s -instcombine -S | FileCheck %s define i1 @lt_signed_to_large_unsigned(i8 %SB) { ; CHECK-LABEL: @lt_signed_to_large_unsigned( -; CHECK-NEXT: [[C1:%.*]] = icmp sgt i8 %SB, -1 -; CHECK-NEXT: ret i1 [[C1]] +; CHECK-NEXT: [[C:%.*]] = icmp sgt i8 [[SB:%.*]], -1 +; CHECK-NEXT: ret i1 [[C]] ; %Y = sext i8 %SB to i32 %C = icmp ult i32 %Y, 1024 @@ -30,7 +30,7 @@ define i1 @lt_signed_to_large_unsigned(i8 %SB) { define i1 @PR28011(i16 %a) { ; CHECK-LABEL: @PR28011( -; CHECK-NEXT: [[CONV:%.*]] = sext i16 %a to i32 +; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[A:%.*]] to i32 ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[CONV]], or (i32 zext (i1 icmp ne (i32*** bitcast ([1 x i32]* @b to i32***), i32*** @a) to i32), i32 1) ; CHECK-NEXT: ret i1 [[CMP]] ; @@ -41,7 +41,7 @@ define i1 @PR28011(i16 %a) { define <2 x i1> @lt_signed_to_large_unsigned_vec(<2 x i8> %SB) { ; CHECK-LABEL: @lt_signed_to_large_unsigned_vec( -; CHECK-NEXT: [[Y:%.*]] = sext <2 x i8> %SB to <2 x i32> +; CHECK-NEXT: [[Y:%.*]] = sext <2 x i8> [[SB:%.*]] to <2 x i32> ; CHECK-NEXT: [[C:%.*]] = icmp ult <2 x i32> [[Y]], ; CHECK-NEXT: ret <2 x i1> [[C]] ; @@ -70,7 +70,7 @@ define i1 @lt_signed_to_large_negative(i8 %SB) { define i1 @lt_signed_to_small_unsigned(i8 %SB) { ; CHECK-LABEL: @lt_signed_to_small_unsigned( -; CHECK-NEXT: [[C:%.*]] = icmp ult i8 %SB, 17 +; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[SB:%.*]], 17 ; CHECK-NEXT: ret i1 [[C]] ; %Y = sext i8 %SB to i32 @@ -80,7 +80,7 @@ define i1 @lt_signed_to_small_unsigned(i8 %SB) { define i1 @lt_signed_to_small_signed(i8 %SB) { ; CHECK-LABEL: @lt_signed_to_small_signed( -; CHECK-NEXT: [[C:%.*]] = icmp slt i8 %SB, 17 +; CHECK-NEXT: [[C:%.*]] = icmp slt i8 [[SB:%.*]], 17 ; CHECK-NEXT: ret i1 [[C]] ; %Y = sext i8 %SB to i32 @@ -89,7 +89,7 @@ define i1 @lt_signed_to_small_signed(i8 %SB) { } define i1 @lt_signed_to_small_negative(i8 %SB) { ; CHECK-LABEL: @lt_signed_to_small_negative( -; CHECK-NEXT: [[C:%.*]] = icmp slt i8 %SB, -17 +; CHECK-NEXT: [[C:%.*]] = icmp slt i8 [[SB:%.*]], -17 ; CHECK-NEXT: ret i1 [[C]] ; %Y = sext i8 %SB to i32 @@ -126,7 +126,7 @@ define i1 @lt_unsigned_to_large_negative(i8 %SB) { define i1 @lt_unsigned_to_small_unsigned(i8 %SB) { ; CHECK-LABEL: @lt_unsigned_to_small_unsigned( -; CHECK-NEXT: [[C:%.*]] = icmp ult i8 %SB, 17 +; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[SB:%.*]], 17 ; CHECK-NEXT: ret i1 [[C]] ; %Y = zext i8 %SB to i32 @@ -136,7 +136,7 @@ define i1 @lt_unsigned_to_small_unsigned(i8 %SB) { define i1 @lt_unsigned_to_small_signed(i8 %SB) { ; CHECK-LABEL: @lt_unsigned_to_small_signed( -; CHECK-NEXT: [[C:%.*]] = icmp ult i8 %SB, 17 +; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[SB:%.*]], 17 ; CHECK-NEXT: ret i1 [[C]] ; %Y = zext i8 %SB to i32 @@ -155,7 +155,7 @@ define i1 @lt_unsigned_to_small_negative(i8 %SB) { define i1 @gt_signed_to_large_unsigned(i8 %SB) { ; CHECK-LABEL: @gt_signed_to_large_unsigned( -; CHECK-NEXT: [[C:%.*]] = icmp slt i8 %SB, 0 +; CHECK-NEXT: [[C:%.*]] = icmp slt i8 [[SB:%.*]], 0 ; CHECK-NEXT: ret i1 [[C]] ; %Y = sext i8 %SB to i32 @@ -183,7 +183,7 @@ define i1 @gt_signed_to_large_negative(i8 %SB) { define i1 @gt_signed_to_small_unsigned(i8 %SB) { ; CHECK-LABEL: @gt_signed_to_small_unsigned( -; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 %SB, 17 +; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 [[SB:%.*]], 17 ; CHECK-NEXT: ret i1 [[C]] ; %Y = sext i8 %SB to i32 @@ -193,7 +193,7 @@ define i1 @gt_signed_to_small_unsigned(i8 %SB) { define i1 @gt_signed_to_small_signed(i8 %SB) { ; CHECK-LABEL: @gt_signed_to_small_signed( -; CHECK-NEXT: [[C:%.*]] = icmp sgt i8 %SB, 17 +; CHECK-NEXT: [[C:%.*]] = icmp sgt i8 [[SB:%.*]], 17 ; CHECK-NEXT: ret i1 [[C]] ; %Y = sext i8 %SB to i32 @@ -203,7 +203,7 @@ define i1 @gt_signed_to_small_signed(i8 %SB) { define i1 @gt_signed_to_small_negative(i8 %SB) { ; CHECK-LABEL: @gt_signed_to_small_negative( -; CHECK-NEXT: [[C:%.*]] = icmp sgt i8 %SB, -17 +; CHECK-NEXT: [[C:%.*]] = icmp sgt i8 [[SB:%.*]], -17 ; CHECK-NEXT: ret i1 [[C]] ; %Y = sext i8 %SB to i32 @@ -240,7 +240,7 @@ define i1 @gt_unsigned_to_large_negative(i8 %SB) { define i1 @gt_unsigned_to_small_unsigned(i8 %SB) { ; CHECK-LABEL: @gt_unsigned_to_small_unsigned( -; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 %SB, 17 +; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 [[SB:%.*]], 17 ; CHECK-NEXT: ret i1 [[C]] ; %Y = zext i8 %SB to i32 @@ -250,7 +250,7 @@ define i1 @gt_unsigned_to_small_unsigned(i8 %SB) { define i1 @gt_unsigned_to_small_signed(i8 %SB) { ; CHECK-LABEL: @gt_unsigned_to_small_signed( -; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 %SB, 17 +; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 [[SB:%.*]], 17 ; CHECK-NEXT: ret i1 [[C]] ; %Y = zext i8 %SB to i32 @@ -267,3 +267,175 @@ define i1 @gt_unsigned_to_small_negative(i8 %SB) { ret i1 %C } +define i1 @different_size_zext_zext_ugt(i7 %x, i4 %y) { +; CHECK-LABEL: @different_size_zext_zext_ugt( +; CHECK-NEXT: [[ZX:%.*]] = zext i7 [[X:%.*]] to i25 +; CHECK-NEXT: [[ZY:%.*]] = zext i4 [[Y:%.*]] to i25 +; CHECK-NEXT: [[R:%.*]] = icmp ugt i25 [[ZX]], [[ZY]] +; CHECK-NEXT: ret i1 [[R]] +; + %zx = zext i7 %x to i25 + %zy = zext i4 %y to i25 + %r = icmp ugt i25 %zx, %zy + ret i1 %r +} + +define <2 x i1> @different_size_zext_zext_ugt_commute(<2 x i4> %x, <2 x i7> %y) { +; CHECK-LABEL: @different_size_zext_zext_ugt_commute( +; CHECK-NEXT: [[ZX:%.*]] = zext <2 x i4> [[X:%.*]] to <2 x i25> +; CHECK-NEXT: [[ZY:%.*]] = zext <2 x i7> [[Y:%.*]] to <2 x i25> +; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i25> [[ZX]], [[ZY]] +; CHECK-NEXT: ret <2 x i1> [[R]] +; + %zx = zext <2 x i4> %x to <2 x i25> + %zy = zext <2 x i7> %y to <2 x i25> + %r = icmp ugt <2 x i25> %zx, %zy + ret <2 x i1> %r +} + +define i1 @different_size_zext_zext_ult(i4 %x, i7 %y) { +; CHECK-LABEL: @different_size_zext_zext_ult( +; CHECK-NEXT: [[ZX:%.*]] = zext i4 [[X:%.*]] to i25 +; CHECK-NEXT: [[ZY:%.*]] = zext i7 [[Y:%.*]] to i25 +; CHECK-NEXT: [[R:%.*]] = icmp ult i25 [[ZX]], [[ZY]] +; CHECK-NEXT: ret i1 [[R]] +; + %zx = zext i4 %x to i25 + %zy = zext i7 %y to i25 + %r = icmp ult i25 %zx, %zy + ret i1 %r +} + +define i1 @different_size_zext_zext_eq(i4 %x, i7 %y) { +; CHECK-LABEL: @different_size_zext_zext_eq( +; CHECK-NEXT: [[ZX:%.*]] = zext i4 [[X:%.*]] to i25 +; CHECK-NEXT: [[ZY:%.*]] = zext i7 [[Y:%.*]] to i25 +; CHECK-NEXT: [[R:%.*]] = icmp eq i25 [[ZX]], [[ZY]] +; CHECK-NEXT: ret i1 [[R]] +; + %zx = zext i4 %x to i25 + %zy = zext i7 %y to i25 + %r = icmp eq i25 %zx, %zy + ret i1 %r +} + +define i1 @different_size_zext_zext_ne_commute(i7 %x, i4 %y) { +; CHECK-LABEL: @different_size_zext_zext_ne_commute( +; CHECK-NEXT: [[ZX:%.*]] = zext i7 [[X:%.*]] to i25 +; CHECK-NEXT: [[ZY:%.*]] = zext i4 [[Y:%.*]] to i25 +; CHECK-NEXT: [[R:%.*]] = icmp ne i25 [[ZX]], [[ZY]] +; CHECK-NEXT: ret i1 [[R]] +; + %zx = zext i7 %x to i25 + %zy = zext i4 %y to i25 + %r = icmp ne i25 %zx, %zy + ret i1 %r +} + +define i1 @different_size_zext_zext_slt(i7 %x, i4 %y) { +; CHECK-LABEL: @different_size_zext_zext_slt( +; CHECK-NEXT: [[ZX:%.*]] = zext i7 [[X:%.*]] to i25 +; CHECK-NEXT: [[ZY:%.*]] = zext i4 [[Y:%.*]] to i25 +; CHECK-NEXT: [[R:%.*]] = icmp ult i25 [[ZX]], [[ZY]] +; CHECK-NEXT: ret i1 [[R]] +; + %zx = zext i7 %x to i25 + %zy = zext i4 %y to i25 + %r = icmp slt i25 %zx, %zy + ret i1 %r +} + +define i1 @different_size_zext_zext_sgt(i7 %x, i4 %y) { +; CHECK-LABEL: @different_size_zext_zext_sgt( +; CHECK-NEXT: [[ZX:%.*]] = zext i7 [[X:%.*]] to i25 +; CHECK-NEXT: [[ZY:%.*]] = zext i4 [[Y:%.*]] to i25 +; CHECK-NEXT: [[R:%.*]] = icmp ugt i25 [[ZX]], [[ZY]] +; CHECK-NEXT: ret i1 [[R]] +; + %zx = zext i7 %x to i25 + %zy = zext i4 %y to i25 + %r = icmp sgt i25 %zx, %zy + ret i1 %r +} + +define i1 @different_size_sext_sext_sgt(i7 %x, i4 %y) { +; CHECK-LABEL: @different_size_sext_sext_sgt( +; CHECK-NEXT: [[SX:%.*]] = sext i7 [[X:%.*]] to i25 +; CHECK-NEXT: [[SY:%.*]] = sext i4 [[Y:%.*]] to i25 +; CHECK-NEXT: [[R:%.*]] = icmp sgt i25 [[SX]], [[SY]] +; CHECK-NEXT: ret i1 [[R]] +; + %sx = sext i7 %x to i25 + %sy = sext i4 %y to i25 + %r = icmp sgt i25 %sx, %sy + ret i1 %r +} + +define i1 @different_size_sext_sext_sle(i7 %x, i4 %y) { +; CHECK-LABEL: @different_size_sext_sext_sle( +; CHECK-NEXT: [[SX:%.*]] = sext i7 [[X:%.*]] to i25 +; CHECK-NEXT: [[SY:%.*]] = sext i4 [[Y:%.*]] to i25 +; CHECK-NEXT: [[R:%.*]] = icmp sle i25 [[SX]], [[SY]] +; CHECK-NEXT: ret i1 [[R]] +; + %sx = sext i7 %x to i25 + %sy = sext i4 %y to i25 + %r = icmp sle i25 %sx, %sy + ret i1 %r +} + +define i1 @different_size_sext_sext_eq(i7 %x, i4 %y) { +; CHECK-LABEL: @different_size_sext_sext_eq( +; CHECK-NEXT: [[SX:%.*]] = sext i7 [[X:%.*]] to i25 +; CHECK-NEXT: [[SY:%.*]] = sext i4 [[Y:%.*]] to i25 +; CHECK-NEXT: [[R:%.*]] = icmp eq i25 [[SX]], [[SY]] +; CHECK-NEXT: ret i1 [[R]] +; + %sx = sext i7 %x to i25 + %sy = sext i4 %y to i25 + %r = icmp eq i25 %sx, %sy + ret i1 %r +} + +define i1 @different_size_sext_sext_ule(i7 %x, i4 %y) { +; CHECK-LABEL: @different_size_sext_sext_ule( +; CHECK-NEXT: [[SX:%.*]] = sext i7 [[X:%.*]] to i25 +; CHECK-NEXT: [[SY:%.*]] = sext i4 [[Y:%.*]] to i25 +; CHECK-NEXT: [[R:%.*]] = icmp ule i25 [[SX]], [[SY]] +; CHECK-NEXT: ret i1 [[R]] +; + %sx = sext i7 %x to i25 + %sy = sext i4 %y to i25 + %r = icmp ule i25 %sx, %sy + ret i1 %r +} + +define i1 @different_size_sext_zext_ne(i7 %x, i4 %y) { +; CHECK-LABEL: @different_size_sext_zext_ne( +; CHECK-NEXT: [[SX:%.*]] = sext i7 [[X:%.*]] to i25 +; CHECK-NEXT: [[ZY:%.*]] = zext i4 [[Y:%.*]] to i25 +; CHECK-NEXT: [[R:%.*]] = icmp ne i25 [[SX]], [[ZY]] +; CHECK-NEXT: ret i1 [[R]] +; + %sx = sext i7 %x to i25 + %zy = zext i4 %y to i25 + %r = icmp ne i25 %sx, %zy + ret i1 %r +} + +declare void @use(i25) + +define i1 @different_size_sext_sext_ule_extra_use(i7 %x, i4 %y) { +; CHECK-LABEL: @different_size_sext_sext_ule_extra_use( +; CHECK-NEXT: [[SX:%.*]] = sext i7 [[X:%.*]] to i25 +; CHECK-NEXT: [[SY:%.*]] = sext i4 [[Y:%.*]] to i25 +; CHECK-NEXT: call void @use(i25 [[SY]]) +; CHECK-NEXT: [[R:%.*]] = icmp ule i25 [[SX]], [[SY]] +; CHECK-NEXT: ret i1 [[R]] +; + %sx = sext i7 %x to i25 + %sy = sext i4 %y to i25 + call void @use(i25 %sy) + %r = icmp ule i25 %sx, %sy + ret i1 %r +} -- 2.40.0