From c8c4d68b0662073977ec4c53cabd16a33b6c2985 Mon Sep 17 00:00:00 2001 From: Hans Wennborg Date: Tue, 4 Aug 2015 00:40:54 +0000 Subject: [PATCH] Reverting r239883 and r240720: ------------------------------------------------------------------------ r239883 | echristo | 2015-06-17 00:09:32 -0700 (Wed, 17 Jun 2015) | 16 lines Update the intel intrinsic headers to use the target attribute support. This involved removing the conditional inclusion and replacing them with target attributes matching the original conditional inclusion and checks. The testcase update removes the macro checks for each file and replaces them with usage of the __target__ attribute, e.g.: int __attribute__((__target__(("sse3")))) foo(int a) { _mm_mwait(0, 0); return 4; } This usage does require the enclosing function have the requisite __target__ attribute for inlining and code generation - also for any macro intrinsic uses in the enclosing function. There's no change for existing uses of the intrinsic headers. ------------------------------------------------------------------------ ------------------------------------------------------------------------ r240720 | silvas | 2015-06-25 16:22:11 -0700 (Thu, 25 Jun 2015) | 6 lines Remove `requires` for x86 CPU features. Ever since the target attributes change, we don't need to guard these headers with `requires`. Actually it's a bit worse, because if we do then they are included textually under the covers, causing declarations to appear in submodules they aren't supposed to be in. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_37@243925 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Headers/__wmmintrin_aes.h | 8 +- lib/Headers/__wmmintrin_pclmul.h | 4 + lib/Headers/adxintrin.h | 6 +- lib/Headers/ammintrin.h | 8 +- lib/Headers/avx2intrin.h | 2 +- lib/Headers/avx512bwintrin.h | 2 +- lib/Headers/avx512dqintrin.h | 2 +- lib/Headers/avx512fintrin.h | 2 +- lib/Headers/avx512vlbwintrin.h | 2 +- lib/Headers/avx512vldqintrin.h | 2 +- lib/Headers/avx512vlintrin.h | 2 +- lib/Headers/avxintrin.h | 2 +- lib/Headers/bmi2intrin.h | 6 +- lib/Headers/bmiintrin.h | 6 +- lib/Headers/emmintrin.h | 8 +- lib/Headers/f16cintrin.h | 6 +- lib/Headers/fma4intrin.h | 8 +- lib/Headers/fmaintrin.h | 8 +- lib/Headers/immintrin.h | 74 ++++++++++++++--- lib/Headers/lzcntintrin.h | 6 +- lib/Headers/mm3dnow.h | 2 +- lib/Headers/mmintrin.h | 8 +- lib/Headers/module.modulemap | 25 ++++++ lib/Headers/nmmintrin.h | 5 ++ lib/Headers/pmmintrin.h | 8 +- lib/Headers/popcntintrin.h | 6 +- lib/Headers/rdseedintrin.h | 5 +- lib/Headers/rtmintrin.h | 2 +- lib/Headers/shaintrin.h | 6 +- lib/Headers/smmintrin.h | 15 ++-- lib/Headers/tbmintrin.h | 6 +- lib/Headers/tmmintrin.h | 8 +- lib/Headers/wmmintrin.h | 9 ++ lib/Headers/x86intrin.h | 24 ++++++ lib/Headers/xmmintrin.h | 8 +- lib/Headers/xopintrin.h | 8 +- test/Headers/pmmintrin.c | 12 --- test/Headers/x86intrin-2.c | 137 ------------------------------- test/Headers/x86intrin.c | 121 ++++++++++++++++++++++++++- 39 files changed, 382 insertions(+), 197 deletions(-) delete mode 100644 test/Headers/pmmintrin.c delete mode 100644 test/Headers/x86intrin-2.c diff --git a/lib/Headers/__wmmintrin_aes.h b/lib/Headers/__wmmintrin_aes.h index 81b2b8d0b0..9f594ee560 100644 --- a/lib/Headers/__wmmintrin_aes.h +++ b/lib/Headers/__wmmintrin_aes.h @@ -25,8 +25,12 @@ #include +#if !defined (__AES__) +# error "AES instructions not enabled" +#else + /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("aes"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_aesenc_si128(__m128i __V, __m128i __R) @@ -63,4 +67,6 @@ _mm_aesimc_si128(__m128i __V) #undef __DEFAULT_FN_ATTRS +#endif + #endif /* _WMMINTRIN_AES_H */ diff --git a/lib/Headers/__wmmintrin_pclmul.h b/lib/Headers/__wmmintrin_pclmul.h index 48a85d24ee..8d1f1b7c08 100644 --- a/lib/Headers/__wmmintrin_pclmul.h +++ b/lib/Headers/__wmmintrin_pclmul.h @@ -23,8 +23,12 @@ #ifndef _WMMINTRIN_PCLMUL_H #define _WMMINTRIN_PCLMUL_H +#if !defined (__PCLMUL__) +# error "PCLMUL instruction is not enabled" +#else #define _mm_clmulepi64_si128(__X, __Y, __I) \ ((__m128i)__builtin_ia32_pclmulqdq128((__v2di)(__m128i)(__X), \ (__v2di)(__m128i)(__Y), (char)(__I))) +#endif #endif /* _WMMINTRIN_PCLMUL_H */ diff --git a/lib/Headers/adxintrin.h b/lib/Headers/adxintrin.h index ee34728417..b8eb9cbf6e 100644 --- a/lib/Headers/adxintrin.h +++ b/lib/Headers/adxintrin.h @@ -32,7 +32,8 @@ #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) /* Intrinsics that are available only if __ADX__ defined */ -static __inline unsigned char __attribute__((__always_inline__, __nodebug__, __target__("adx"))) +#ifdef __ADX__ +static __inline unsigned char __DEFAULT_FN_ATTRS _addcarryx_u32(unsigned char __cf, unsigned int __x, unsigned int __y, unsigned int *__p) { @@ -40,13 +41,14 @@ _addcarryx_u32(unsigned char __cf, unsigned int __x, unsigned int __y, } #ifdef __x86_64__ -static __inline unsigned char __attribute__((__always_inline__, __nodebug__, __target__("adx"))) +static __inline unsigned char __DEFAULT_FN_ATTRS _addcarryx_u64(unsigned char __cf, unsigned long long __x, unsigned long long __y, unsigned long long *__p) { return __builtin_ia32_addcarryx_u64(__cf, __x, __y, __p); } #endif +#endif /* Intrinsics that are also available if __ADX__ undefined */ static __inline unsigned char __DEFAULT_FN_ATTRS diff --git a/lib/Headers/ammintrin.h b/lib/Headers/ammintrin.h index 91c633305b..4d0e770ff9 100644 --- a/lib/Headers/ammintrin.h +++ b/lib/Headers/ammintrin.h @@ -24,10 +24,14 @@ #ifndef __AMMINTRIN_H #define __AMMINTRIN_H +#ifndef __SSE4A__ +#error "SSE4A instruction set not enabled" +#else + #include /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse4a"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) /// \brief Extracts the specified bits from the lower 64 bits of the 128-bit /// integer vector operand at the index idx and of the length len. @@ -206,4 +210,6 @@ _mm_stream_ss(float *__p, __m128 __a) #undef __DEFAULT_FN_ATTRS +#endif /* __SSE4A__ */ + #endif /* __AMMINTRIN_H */ diff --git a/lib/Headers/avx2intrin.h b/lib/Headers/avx2intrin.h index cfa91410a3..d8b6b0aa4d 100644 --- a/lib/Headers/avx2intrin.h +++ b/lib/Headers/avx2intrin.h @@ -29,7 +29,7 @@ #define __AVX2INTRIN_H /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx2"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) /* SSE4 Multiple Packed Sums of Absolute Difference. */ #define _mm256_mpsadbw_epu8(X, Y, M) __builtin_ia32_mpsadbw256((X), (Y), (M)) diff --git a/lib/Headers/avx512bwintrin.h b/lib/Headers/avx512bwintrin.h index b0d3462d4d..9e8297a9c9 100644 --- a/lib/Headers/avx512bwintrin.h +++ b/lib/Headers/avx512bwintrin.h @@ -34,7 +34,7 @@ typedef char __v64qi __attribute__ ((__vector_size__ (64))); typedef short __v32hi __attribute__ ((__vector_size__ (64))); /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512bw"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline __v64qi __DEFAULT_FN_ATTRS _mm512_setzero_qi (void) { diff --git a/lib/Headers/avx512dqintrin.h b/lib/Headers/avx512dqintrin.h index 8a69f7ffbf..c946de2867 100644 --- a/lib/Headers/avx512dqintrin.h +++ b/lib/Headers/avx512dqintrin.h @@ -29,7 +29,7 @@ #define __AVX512DQINTRIN_H /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512dq"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mullo_epi64 (__m512i __A, __m512i __B) { diff --git a/lib/Headers/avx512fintrin.h b/lib/Headers/avx512fintrin.h index 0991144536..4f7cba0b15 100644 --- a/lib/Headers/avx512fintrin.h +++ b/lib/Headers/avx512fintrin.h @@ -47,7 +47,7 @@ typedef unsigned short __mmask16; #define _MM_FROUND_CUR_DIRECTION 0x04 /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512f"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) /* Create vectors with repeated elements */ diff --git a/lib/Headers/avx512vlbwintrin.h b/lib/Headers/avx512vlbwintrin.h index eb198a5ade..74ec175830 100644 --- a/lib/Headers/avx512vlbwintrin.h +++ b/lib/Headers/avx512vlbwintrin.h @@ -29,7 +29,7 @@ #define __AVX512VLBWINTRIN_H /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512vl,avx512bw"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) /* Integer compare */ diff --git a/lib/Headers/avx512vldqintrin.h b/lib/Headers/avx512vldqintrin.h index 032070bfb9..1edf29d128 100644 --- a/lib/Headers/avx512vldqintrin.h +++ b/lib/Headers/avx512vldqintrin.h @@ -29,7 +29,7 @@ #define __AVX512VLDQINTRIN_H /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512vl,avx512dq"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_mullo_epi64 (__m256i __A, __m256i __B) { diff --git a/lib/Headers/avx512vlintrin.h b/lib/Headers/avx512vlintrin.h index 73f46d101a..fc1b9d6e7a 100644 --- a/lib/Headers/avx512vlintrin.h +++ b/lib/Headers/avx512vlintrin.h @@ -29,7 +29,7 @@ #define __AVX512VLINTRIN_H /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512vl"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) /* Integer compare */ diff --git a/lib/Headers/avxintrin.h b/lib/Headers/avxintrin.h index 6a9972b65b..c1bc85b39e 100644 --- a/lib/Headers/avxintrin.h +++ b/lib/Headers/avxintrin.h @@ -40,7 +40,7 @@ typedef double __m256d __attribute__((__vector_size__(32))); typedef long long __m256i __attribute__((__vector_size__(32))); /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) /* Arithmetic */ static __inline __m256d __DEFAULT_FN_ATTRS diff --git a/lib/Headers/bmi2intrin.h b/lib/Headers/bmi2intrin.h index fdae82cf2b..c63397c96e 100644 --- a/lib/Headers/bmi2intrin.h +++ b/lib/Headers/bmi2intrin.h @@ -25,11 +25,15 @@ #error "Never use directly; include instead." #endif +#ifndef __BMI2__ +# error "BMI2 instruction set not enabled" +#endif /* __BMI2__ */ + #ifndef __BMI2INTRIN_H #define __BMI2INTRIN_H /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("bmi2"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ unsigned int __DEFAULT_FN_ATTRS _bzhi_u32(unsigned int __X, unsigned int __Y) diff --git a/lib/Headers/bmiintrin.h b/lib/Headers/bmiintrin.h index dc2f83f3e2..0e93d575cb 100644 --- a/lib/Headers/bmiintrin.h +++ b/lib/Headers/bmiintrin.h @@ -25,6 +25,10 @@ #error "Never use directly; include instead." #endif +#ifndef __BMI__ +# error "BMI instruction set not enabled" +#endif /* __BMI__ */ + #ifndef __BMIINTRIN_H #define __BMIINTRIN_H @@ -37,7 +41,7 @@ #define _tzcnt_u32(a) (__tzcnt_u32((a))) /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("bmi"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ unsigned short __DEFAULT_FN_ATTRS __tzcnt_u16(unsigned short __X) diff --git a/lib/Headers/emmintrin.h b/lib/Headers/emmintrin.h index e22ffaf192..656bc19d3d 100644 --- a/lib/Headers/emmintrin.h +++ b/lib/Headers/emmintrin.h @@ -24,6 +24,10 @@ #ifndef __EMMINTRIN_H #define __EMMINTRIN_H +#ifndef __SSE2__ +#error "SSE2 instruction set not enabled" +#else + #include typedef double __m128d __attribute__((__vector_size__(16))); @@ -36,7 +40,7 @@ typedef short __v8hi __attribute__((__vector_size__(16))); typedef char __v16qi __attribute__((__vector_size__(16))); /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse2"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_add_sd(__m128d __a, __m128d __b) @@ -1471,4 +1475,6 @@ _mm_pause(void) #define _MM_SHUFFLE2(x, y) (((x) << 1) | (y)) +#endif /* __SSE2__ */ + #endif /* __EMMINTRIN_H */ diff --git a/lib/Headers/f16cintrin.h b/lib/Headers/f16cintrin.h index 9349b78fe8..3730ae0d3e 100644 --- a/lib/Headers/f16cintrin.h +++ b/lib/Headers/f16cintrin.h @@ -25,6 +25,10 @@ #error "Never use directly; include instead." #endif +#ifndef __F16C__ +# error "F16C instruction is not enabled" +#endif /* __F16C__ */ + #ifndef __F16CINTRIN_H #define __F16CINTRIN_H @@ -32,7 +36,7 @@ typedef float __v8sf __attribute__ ((__vector_size__ (32))); typedef float __m256 __attribute__ ((__vector_size__ (32))); /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("f16c"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) #define _mm_cvtps_ph(a, imm) __extension__ ({ \ __m128 __a = (a); \ diff --git a/lib/Headers/fma4intrin.h b/lib/Headers/fma4intrin.h index f1178877b2..d6405cf029 100644 --- a/lib/Headers/fma4intrin.h +++ b/lib/Headers/fma4intrin.h @@ -28,10 +28,14 @@ #ifndef __FMA4INTRIN_H #define __FMA4INTRIN_H +#ifndef __FMA4__ +# error "FMA4 instruction set is not enabled" +#else + #include /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("fma4"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C) @@ -227,4 +231,6 @@ _mm256_msubadd_pd(__m256d __A, __m256d __B, __m256d __C) #undef __DEFAULT_FN_ATTRS +#endif /* __FMA4__ */ + #endif /* __FMA4INTRIN_H */ diff --git a/lib/Headers/fmaintrin.h b/lib/Headers/fmaintrin.h index 114a14380e..ad693fed0b 100644 --- a/lib/Headers/fmaintrin.h +++ b/lib/Headers/fmaintrin.h @@ -28,8 +28,12 @@ #ifndef __FMAINTRIN_H #define __FMAINTRIN_H +#ifndef __FMA__ +# error "FMA instruction set is not enabled" +#else + /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("fma"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_fmadd_ps(__m128 __A, __m128 __B, __m128 __C) @@ -225,4 +229,6 @@ _mm256_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C) #undef __DEFAULT_FN_ATTRS +#endif /* __FMA__ */ + #endif /* __FMAINTRIN_H */ diff --git a/lib/Headers/immintrin.h b/lib/Headers/immintrin.h index 604bc8ca5b..21ad3281f8 100644 --- a/lib/Headers/immintrin.h +++ b/lib/Headers/immintrin.h @@ -24,123 +24,175 @@ #ifndef __IMMINTRIN_H #define __IMMINTRIN_H +#ifdef __MMX__ #include +#endif +#ifdef __SSE__ #include +#endif +#ifdef __SSE2__ #include +#endif +#ifdef __SSE3__ #include +#endif +#ifdef __SSSE3__ #include +#endif +#if defined (__SSE4_2__) || defined (__SSE4_1__) #include +#endif +#if defined (__AES__) || defined (__PCLMUL__) #include +#endif +#ifdef __AVX__ #include +#endif +#ifdef __AVX2__ #include +#endif +#ifdef __BMI__ #include +#endif +#ifdef __BMI2__ #include +#endif +#ifdef __LZCNT__ #include +#endif +#ifdef __FMA__ #include +#endif +#ifdef __AVX512F__ #include +#endif +#ifdef __AVX512VL__ #include +#endif +#ifdef __AVX512BW__ #include +#endif +#ifdef __AVX512CD__ #include +#endif +#ifdef __AVX512DQ__ #include +#endif +#if defined (__AVX512VL__) && defined (__AVX512BW__) #include +#endif +#if defined (__AVX512VL__) && defined (__AVX512DQ__) #include +#endif +#ifdef __AVX512ER__ #include +#endif -static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd"))) +#ifdef __RDRND__ +static __inline__ int __attribute__((__always_inline__, __nodebug__)) _rdrand16_step(unsigned short *__p) { return __builtin_ia32_rdrand16_step(__p); } -static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd"))) +static __inline__ int __attribute__((__always_inline__, __nodebug__)) _rdrand32_step(unsigned int *__p) { return __builtin_ia32_rdrand32_step(__p); } #ifdef __x86_64__ -static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd"))) +static __inline__ int __attribute__((__always_inline__, __nodebug__)) _rdrand64_step(unsigned long long *__p) { return __builtin_ia32_rdrand64_step(__p); } #endif +#endif /* __RDRND__ */ +#ifdef __FSGSBASE__ #ifdef __x86_64__ -static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) +static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__)) _readfsbase_u32(void) { return __builtin_ia32_rdfsbase32(); } -static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) +static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__)) _readfsbase_u64(void) { return __builtin_ia32_rdfsbase64(); } -static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) +static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__)) _readgsbase_u32(void) { return __builtin_ia32_rdgsbase32(); } -static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) +static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__)) _readgsbase_u64(void) { return __builtin_ia32_rdgsbase64(); } -static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) +static __inline__ void __attribute__((__always_inline__, __nodebug__)) _writefsbase_u32(unsigned int __V) { return __builtin_ia32_wrfsbase32(__V); } -static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) +static __inline__ void __attribute__((__always_inline__, __nodebug__)) _writefsbase_u64(unsigned long long __V) { return __builtin_ia32_wrfsbase64(__V); } -static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) +static __inline__ void __attribute__((__always_inline__, __nodebug__)) _writegsbase_u32(unsigned int __V) { return __builtin_ia32_wrgsbase32(__V); } -static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) +static __inline__ void __attribute__((__always_inline__, __nodebug__)) _writegsbase_u64(unsigned long long __V) { return __builtin_ia32_wrgsbase64(__V); } #endif +#endif /* __FSGSBASE__ */ +#ifdef __RTM__ #include +#endif +#ifdef __RTM__ #include +#endif +#ifdef __SHA__ #include +#endif #include diff --git a/lib/Headers/lzcntintrin.h b/lib/Headers/lzcntintrin.h index 4c00e42ac3..8ee29975c2 100644 --- a/lib/Headers/lzcntintrin.h +++ b/lib/Headers/lzcntintrin.h @@ -25,11 +25,15 @@ #error "Never use directly; include instead." #endif +#ifndef __LZCNT__ +# error "LZCNT instruction is not enabled" +#endif /* __LZCNT__ */ + #ifndef __LZCNTINTRIN_H #define __LZCNTINTRIN_H /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("lzcnt"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ unsigned short __DEFAULT_FN_ATTRS __lzcnt16(unsigned short __X) diff --git a/lib/Headers/mm3dnow.h b/lib/Headers/mm3dnow.h index 3218df8271..ac8e0f4af1 100644 --- a/lib/Headers/mm3dnow.h +++ b/lib/Headers/mm3dnow.h @@ -30,7 +30,7 @@ typedef float __v2sf __attribute__((__vector_size__(8))); /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("3dnow"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ void __DEFAULT_FN_ATTRS _m_femms() { diff --git a/lib/Headers/mmintrin.h b/lib/Headers/mmintrin.h index 484b499dd7..0be5f32c7d 100644 --- a/lib/Headers/mmintrin.h +++ b/lib/Headers/mmintrin.h @@ -24,6 +24,10 @@ #ifndef __MMINTRIN_H #define __MMINTRIN_H +#ifndef __MMX__ +#error "MMX instruction set not enabled" +#else + typedef long long __m64 __attribute__((__vector_size__(8))); typedef int __v2si __attribute__((__vector_size__(8))); @@ -31,7 +35,7 @@ typedef short __v4hi __attribute__((__vector_size__(8))); typedef char __v8qi __attribute__((__vector_size__(8))); /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("mmx"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ void __DEFAULT_FN_ATTRS _mm_empty(void) @@ -497,5 +501,7 @@ _mm_setr_pi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5, #define _m_pcmpgtw _mm_cmpgt_pi16 #define _m_pcmpgtd _mm_cmpgt_pi32 +#endif /* __MMX__ */ + #endif /* __MMINTRIN_H */ diff --git a/lib/Headers/module.modulemap b/lib/Headers/module.modulemap index b147e891dc..b861fdd8c2 100644 --- a/lib/Headers/module.modulemap +++ b/lib/Headers/module.modulemap @@ -32,117 +32,142 @@ module _Builtin_intrinsics [system] [extern_c] { } explicit module cpuid { + requires x86 header "cpuid.h" } explicit module mmx { + requires mmx header "mmintrin.h" } explicit module f16c { + requires f16c header "f16cintrin.h" } explicit module sse { + requires sse export mmx export sse2 // note: for hackish dependency header "xmmintrin.h" } explicit module sse2 { + requires sse2 export sse header "emmintrin.h" } explicit module sse3 { + requires sse3 export sse2 header "pmmintrin.h" } explicit module ssse3 { + requires ssse3 export sse3 header "tmmintrin.h" } explicit module sse4_1 { + requires sse41 export ssse3 header "smmintrin.h" } explicit module sse4_2 { + requires sse42 export sse4_1 header "nmmintrin.h" } explicit module sse4a { + requires sse4a export sse3 header "ammintrin.h" } explicit module avx { + requires avx export sse4_2 header "avxintrin.h" } explicit module avx2 { + requires avx2 export avx header "avx2intrin.h" } explicit module avx512f { + requires avx512f export avx2 header "avx512fintrin.h" } explicit module avx512er { + requires avx512er header "avx512erintrin.h" } explicit module bmi { + requires bmi header "bmiintrin.h" } explicit module bmi2 { + requires bmi2 header "bmi2intrin.h" } explicit module fma { + requires fma header "fmaintrin.h" } explicit module fma4 { + requires fma4 export sse3 header "fma4intrin.h" } explicit module lzcnt { + requires lzcnt header "lzcntintrin.h" } explicit module popcnt { + requires popcnt header "popcntintrin.h" } explicit module mm3dnow { + requires mm3dnow header "mm3dnow.h" } explicit module xop { + requires xop export fma4 header "xopintrin.h" } explicit module aes_pclmul { + requires aes, pclmul header "wmmintrin.h" export aes export pclmul } explicit module aes { + requires aes header "__wmmintrin_aes.h" } explicit module pclmul { + requires pclmul header "__wmmintrin_pclmul.h" } } diff --git a/lib/Headers/nmmintrin.h b/lib/Headers/nmmintrin.h index 57fec15963..f12622d7be 100644 --- a/lib/Headers/nmmintrin.h +++ b/lib/Headers/nmmintrin.h @@ -24,7 +24,12 @@ #ifndef _NMMINTRIN_H #define _NMMINTRIN_H +#ifndef __SSE4_2__ +#error "SSE4.2 instruction set not enabled" +#else + /* To match expectations of gcc we put the sse4.2 definitions into smmintrin.h, just include it now then. */ #include +#endif /* __SSE4_2__ */ #endif /* _NMMINTRIN_H */ diff --git a/lib/Headers/pmmintrin.h b/lib/Headers/pmmintrin.h index e888b6fb70..e1b8d9b603 100644 --- a/lib/Headers/pmmintrin.h +++ b/lib/Headers/pmmintrin.h @@ -24,10 +24,14 @@ #ifndef __PMMINTRIN_H #define __PMMINTRIN_H +#ifndef __SSE3__ +#error "SSE3 instruction set not enabled" +#else + #include /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse3"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_lddqu_si128(__m128i const *__p) @@ -113,4 +117,6 @@ _mm_mwait(unsigned __extensions, unsigned __hints) #undef __DEFAULT_FN_ATTRS +#endif /* __SSE3__ */ + #endif /* __PMMINTRIN_H */ diff --git a/lib/Headers/popcntintrin.h b/lib/Headers/popcntintrin.h index 29c074b61d..1a4e9000ae 100644 --- a/lib/Headers/popcntintrin.h +++ b/lib/Headers/popcntintrin.h @@ -21,11 +21,15 @@ *===-----------------------------------------------------------------------=== */ +#ifndef __POPCNT__ +#error "POPCNT instruction set not enabled" +#endif + #ifndef _POPCNTINTRIN_H #define _POPCNTINTRIN_H /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("popcnt"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ int __DEFAULT_FN_ATTRS _mm_popcnt_u32(unsigned int __A) diff --git a/lib/Headers/rdseedintrin.h b/lib/Headers/rdseedintrin.h index 421f4ea487..fdf7e18afa 100644 --- a/lib/Headers/rdseedintrin.h +++ b/lib/Headers/rdseedintrin.h @@ -28,8 +28,10 @@ #ifndef __RDSEEDINTRIN_H #define __RDSEEDINTRIN_H +#ifdef __RDSEED__ + /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("rdseed"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ int __DEFAULT_FN_ATTRS _rdseed16_step(unsigned short *__p) @@ -53,4 +55,5 @@ _rdseed64_step(unsigned long long *__p) #undef __DEFAULT_FN_ATTRS +#endif /* __RDSEED__ */ #endif /* __RDSEEDINTRIN_H */ diff --git a/lib/Headers/rtmintrin.h b/lib/Headers/rtmintrin.h index e6a58d743b..17256815fb 100644 --- a/lib/Headers/rtmintrin.h +++ b/lib/Headers/rtmintrin.h @@ -38,7 +38,7 @@ #define _XABORT_CODE(x) (((x) >> 24) & 0xFF) /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("rtm"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ unsigned int __DEFAULT_FN_ATTRS _xbegin(void) diff --git a/lib/Headers/shaintrin.h b/lib/Headers/shaintrin.h index 8602d0249d..960cced7a5 100644 --- a/lib/Headers/shaintrin.h +++ b/lib/Headers/shaintrin.h @@ -28,8 +28,12 @@ #ifndef __SHAINTRIN_H #define __SHAINTRIN_H +#if !defined (__SHA__) +# error "SHA instructions not enabled" +#endif + /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sha"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) #define _mm_sha1rnds4_epu32(V1, V2, M) __extension__ ({ \ __builtin_ia32_sha1rnds4((V1), (V2), (M)); }) diff --git a/lib/Headers/smmintrin.h b/lib/Headers/smmintrin.h index e197590a38..04bd0722b1 100644 --- a/lib/Headers/smmintrin.h +++ b/lib/Headers/smmintrin.h @@ -24,10 +24,14 @@ #ifndef _SMMINTRIN_H #define _SMMINTRIN_H +#ifndef __SSE4_1__ +#error "SSE4.1 instruction set not enabled" +#else + #include /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse4.1"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) /* SSE4 Rounding macros. */ #define _MM_FROUND_TO_NEAREST_INT 0x00 @@ -375,13 +379,9 @@ _mm_minpos_epu16(__m128i __V) return (__m128i) __builtin_ia32_phminposuw128((__v8hi)__V); } -/* Handle the sse4.2 definitions here. */ - /* These definitions are normally in nmmintrin.h, but gcc puts them in here so we'll do the same. */ - -#undef __DEFAULT_FN_ATTRS -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse4.2"))) +#ifdef __SSE4_2__ /* These specify the type of data that we're comparing. */ #define _SIDD_UBYTE_OPS 0x00 @@ -481,4 +481,7 @@ _mm_crc32_u64(unsigned long long __C, unsigned long long __D) #include #endif +#endif /* __SSE4_2__ */ +#endif /* __SSE4_1__ */ + #endif /* _SMMINTRIN_H */ diff --git a/lib/Headers/tbmintrin.h b/lib/Headers/tbmintrin.h index 62f613f9ee..48c0b07f42 100644 --- a/lib/Headers/tbmintrin.h +++ b/lib/Headers/tbmintrin.h @@ -21,6 +21,10 @@ *===-----------------------------------------------------------------------=== */ +#ifndef __TBM__ +#error "TBM instruction set is not enabled" +#endif + #ifndef __X86INTRIN_H #error "Never use directly; include instead." #endif @@ -29,7 +33,7 @@ #define __TBMINTRIN_H /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("tbm"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) #define __bextri_u32(a, b) (__builtin_ia32_bextri_u32((a), (b))) diff --git a/lib/Headers/tmmintrin.h b/lib/Headers/tmmintrin.h index 120d73c34f..2ecc730e90 100644 --- a/lib/Headers/tmmintrin.h +++ b/lib/Headers/tmmintrin.h @@ -24,10 +24,14 @@ #ifndef __TMMINTRIN_H #define __TMMINTRIN_H +#ifndef __SSSE3__ +#error "SSSE3 instruction set not enabled" +#else + #include /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("ssse3"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_abs_pi8(__m64 __a) @@ -221,4 +225,6 @@ _mm_sign_pi32(__m64 __a, __m64 __b) #undef __DEFAULT_FN_ATTRS +#endif /* __SSSE3__ */ + #endif /* __TMMINTRIN_H */ diff --git a/lib/Headers/wmmintrin.h b/lib/Headers/wmmintrin.h index a2d931010a..369e3c208e 100644 --- a/lib/Headers/wmmintrin.h +++ b/lib/Headers/wmmintrin.h @@ -26,8 +26,17 @@ #include +#if !defined (__AES__) && !defined (__PCLMUL__) +# error "AES/PCLMUL instructions not enabled" +#else + +#ifdef __AES__ #include <__wmmintrin_aes.h> +#endif /* __AES__ */ +#ifdef __PCLMUL__ #include <__wmmintrin_pclmul.h> +#endif /* __PCLMUL__ */ +#endif /* __AES__ || __PCLMUL__ */ #endif /* _WMMINTRIN_H */ diff --git a/lib/Headers/x86intrin.h b/lib/Headers/x86intrin.h index 4d8077e382..21a43daf3c 100644 --- a/lib/Headers/x86intrin.h +++ b/lib/Headers/x86intrin.h @@ -28,29 +28,53 @@ #include +#ifdef __3dNOW__ #include +#endif +#ifdef __BMI__ #include +#endif +#ifdef __BMI2__ #include +#endif +#ifdef __LZCNT__ #include +#endif +#ifdef __POPCNT__ #include +#endif +#ifdef __RDSEED__ #include +#endif +#ifdef __PRFCHW__ #include +#endif +#ifdef __SSE4A__ #include +#endif +#ifdef __FMA4__ #include +#endif +#ifdef __XOP__ #include +#endif +#ifdef __TBM__ #include +#endif +#ifdef __F16C__ #include +#endif /* FIXME: LWP */ diff --git a/lib/Headers/xmmintrin.h b/lib/Headers/xmmintrin.h index 18aa8c1426..0d58c75302 100644 --- a/lib/Headers/xmmintrin.h +++ b/lib/Headers/xmmintrin.h @@ -24,6 +24,10 @@ #ifndef __XMMINTRIN_H #define __XMMINTRIN_H +#ifndef __SSE__ +#error "SSE instruction set not enabled" +#else + #include typedef int __v4si __attribute__((__vector_size__(16))); @@ -37,7 +41,7 @@ typedef float __m128 __attribute__((__vector_size__(16))); #endif /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_add_ss(__m128 __a, __m128 __b) @@ -999,4 +1003,6 @@ do { \ #include #endif +#endif /* __SSE__ */ + #endif /* __XMMINTRIN_H */ diff --git a/lib/Headers/xopintrin.h b/lib/Headers/xopintrin.h index 86188bb29f..2eb35c4be8 100644 --- a/lib/Headers/xopintrin.h +++ b/lib/Headers/xopintrin.h @@ -28,10 +28,14 @@ #ifndef __XOPINTRIN_H #define __XOPINTRIN_H +#ifndef __XOP__ +# error "XOP instruction set is not enabled" +#else + #include /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("xop"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C) @@ -800,4 +804,6 @@ _mm256_frcz_pd(__m256d __A) #undef __DEFAULT_FN_ATTRS +#endif /* __XOP__ */ + #endif /* __XOPINTRIN_H */ diff --git a/test/Headers/pmmintrin.c b/test/Headers/pmmintrin.c deleted file mode 100644 index 5b7a3a4ef6..0000000000 --- a/test/Headers/pmmintrin.c +++ /dev/null @@ -1,12 +0,0 @@ -// RUN: %clang_cc1 -fsyntax-only -ffreestanding %s -verify -// RUN: %clang_cc1 -fsyntax-only -ffreestanding -x c++ %s -verify -// expected-no-diagnostics - -#if defined(i386) || defined(__x86_64__) -#include - -int __attribute__((__target__(("sse3")))) foo(int a) { - _mm_mwait(0, 0); - return 4; -} -#endif diff --git a/test/Headers/x86intrin-2.c b/test/Headers/x86intrin-2.c deleted file mode 100644 index f98fdbd13a..0000000000 --- a/test/Headers/x86intrin-2.c +++ /dev/null @@ -1,137 +0,0 @@ -// RUN: %clang_cc1 -fsyntax-only -ffreestanding %s -verify -// RUN: %clang_cc1 -fsyntax-only -ffreestanding -fno-lax-vector-conversions %s -verify -// RUN: %clang_cc1 -fsyntax-only -ffreestanding -x c++ %s -verify -// expected-no-diagnostics - -#if defined(i386) || defined(__x86_64__) - -// Include the metaheader that includes all x86 intrinsic headers. -#include - -void __attribute__((__target__("mmx"))) mm_empty_wrap(void) { - _mm_empty(); -} - -__m128 __attribute__((__target__("sse"))) mm_add_ss_wrap(__m128 a, __m128 b) { - return _mm_add_ss(a, b); -} - -__m128d __attribute__((__target__("sse2"))) mm_sqrt_sd_wrap(__m128d a, __m128d b) { - return _mm_sqrt_sd(a, b); -} - -void __attribute__((__target__("sse3"))) mm_mwait_wrap(int a) { - _mm_mwait(0, 0); -} - -__m64 __attribute__((__target__("ssse3"))) mm_abs_pi8_wrap(__m64 a) { - return _mm_abs_pi8(a); -} - -__m128i __attribute__((__target__("sse4.1"))) mm_minpos_epu16_wrap(__m128i v) { - return _mm_minpos_epu16(v); -} - -unsigned int __attribute__((__target__("sse4.2"))) mm_crc32_u8_wrap(unsigned int c, unsigned char d) { - return _mm_crc32_u8(c, d); -} - -__m128i __attribute__((__target__("aes"))) mm_aesenc_si128_wrap(__m128i v, __m128i r) { - return _mm_aesenc_si128(v, r); -} - -__m256d __attribute__((__target__("avx"))) mm256_add_pd_wrap(__m256d a, __m256d b) { - return _mm256_add_pd(a, b); -} - -__m256i __attribute__((__target__("avx2"))) mm256_abs_epi8_wrap(__m256i a) { - return _mm256_abs_epi8(a); -} - -unsigned short __attribute__((__target__("bmi"))) tzcnt_u16_wrap(unsigned short x) { - return __tzcnt_u16(x); -} - -unsigned int __attribute__((__target__("bmi2"))) bzhi_u32_wrap(unsigned int x, unsigned int y) { - return _bzhi_u32(x, y); -} - -unsigned short __attribute__((__target__("lzcnt"))) lzcnt16_wrap(unsigned short x) { - return __lzcnt16(x); -} - -__m256d __attribute__((__target__("fma"))) mm256_fmsubadd_pd_wrap(__m256d a, __m256d b, __m256d c) { - return _mm256_fmsubadd_pd(a, b, c); -} - -__m512i __attribute__((__target__("avx512f"))) mm512_setzero_si512_wrap(void) { - return _mm512_setzero_si512(); -} - -__mmask8 __attribute__((__target__("avx512vl"))) mm_cmpeq_epi32_mask_wrap(__m128i a, __m128i b) { - return _mm_cmpeq_epi32_mask(a, b); -} - -__v64qi __attribute__((__target__("avx512bw"))) mm512_setzero_qi_wrap(void) { - return _mm512_setzero_qi(); -} - -__m512i __attribute__((__target__("avx512dq"))) mm512_mullo_epi64_wrap(__m512i a, __m512i b) { - return _mm512_mullo_epi64(a, b); -} - -__mmask16 __attribute__((__target__("avx512vl,avx512bw"))) mm_cmpeq_epi8_mask_wrap(__m128i a, __m128i b) { - return _mm_cmpeq_epi8_mask(a, b); -} - -__m256i __attribute__((__target__("avx512vl,avx512dq"))) mm256_mullo_epi64_wrap(__m256i a, __m256i b) { - return _mm256_mullo_epi64(a, b); -} - -int __attribute__((__target__("rdrnd"))) rdrand16_step_wrap(unsigned short *p) { - return _rdrand16_step(p); -} - -#if defined(__x86_64__) -unsigned int __attribute__((__target__("fsgsbase"))) readfsbase_u32_wrap(void) { - return _readfsbase_u32(); -} -#endif - -unsigned int __attribute__((__target__("rtm"))) xbegin_wrap(void) { - return _xbegin(); -} - -__m128i __attribute__((__target__("sha"))) mm_sha1nexte_epu32_wrap(__m128i x, __m128i y) { - return _mm_sha1nexte_epu32(x, y); -} - -int __attribute__((__target__("rdseed"))) rdseed16_step_wrap(unsigned short *p) { - return _rdseed16_step(p); -} - -__m128i __attribute__((__target__("sse4a"))) mm_extract_si64_wrap(__m128i x, __m128i y) { - return _mm_extract_si64(x, y); -} - -__m128 __attribute__((__target__("fma4"))) mm_macc_ps_wrap(__m128 a, __m128 b, __m128 c) { - return _mm_macc_ps(a, b, c); -} - -__m256 __attribute__((__target__("xop"))) mm256_frcz_ps_wrap(__m256 a) { - return _mm256_frcz_ps(a); -} - -unsigned int __attribute__((__target__("tbm"))) blcfill_u32_wrap(unsigned int a) { - return __blcfill_u32(a); -} - -__m128 __attribute__((__target__("f16c"))) mm_cvtph_ps_wrap(__m128i a) { - return _mm_cvtph_ps(a); -} - -int __attribute__((__target__("rtm"))) xtest_wrap(void) { - return _xtest(); -} - -#endif diff --git a/test/Headers/x86intrin.c b/test/Headers/x86intrin.c index 7c15c4816b..6a1608b756 100644 --- a/test/Headers/x86intrin.c +++ b/test/Headers/x86intrin.c @@ -5,7 +5,126 @@ #if defined(i386) || defined(__x86_64__) -// Include the metaheader that includes all x86 intrinsic headers. +// Pretend to enable all features. +#ifndef __3dNOW__ +#define __3dNOW__ +#endif +#ifndef __BMI__ +#define __BMI__ +#endif +#ifndef __BMI2__ +#define __BMI2__ +#endif +#ifndef __LZCNT__ +#define __LZCNT__ +#endif +#ifndef __POPCNT__ +#define __POPCNT__ +#endif +#ifndef __RDSEED__ +#define __RDSEED__ +#endif +#ifndef __PRFCHW__ +#define __PRFCHW__ +#endif +#ifndef __SSE4A__ +#define __SSE4A__ +#endif +#ifndef __FMA4__ +#define __FMA4__ +#endif +#ifndef __XOP__ +#define __XOP__ +#endif +#ifndef __F16C__ +#define __F16C__ +#endif +#ifndef __MMX__ +#define __MMX__ +#endif +#ifndef __SSE__ +#define __SSE__ +#endif +#ifndef __SSE2__ +#define __SSE2__ +#endif +#ifndef __SSE3__ +#define __SSE3__ +#endif +#ifndef __SSSE3__ +#define __SSSE3__ +#endif +#ifndef __SSE4_1__ +#define __SSE4_1__ +#endif +#ifndef __SSE4_2__ +#define __SSE4_2__ +#endif +#ifndef __AES__ +#define __AES__ +#endif +#ifndef __AVX__ +#define __AVX__ +#endif +#ifndef __AVX2__ +#define __AVX2__ +#endif +#ifndef __BMI__ +#define __BMI__ +#endif +#ifndef __BMI2__ +#define __BMI2__ +#endif +#ifndef __LZCNT__ +#define __LZCNT__ +#endif +#ifndef __FMA__ +#define __FMA__ +#endif +#ifndef __RDRND__ +#define __RDRND__ +#endif +#ifndef __SHA__ +#define __SHA__ +#endif +#ifndef __ADX__ +#define __ADX__ +#endif +#ifndef __TBM__ +#define __TBM__ +#endif +#ifndef __RTM__ +#define __RTM__ +#endif +#ifndef __PCLMUL__ +#define __PCLMUL__ +#endif +#ifndef __FSGSBASE__ +#define __FSGSBASE__ +#endif +#ifndef __AVX512F__ +#define __AVX512F__ +#endif +#ifndef __AVX512VL__ +#define __AVX512VL__ +#endif +#ifndef __AVX512BW__ +#define __AVX512BW__ +#endif +#ifndef __AVX512ER__ +#define __AVX512ER__ +#endif +#ifndef __AVX512PF__ +#define __AVX512PF__ +#endif +#ifndef __AVX512DQ__ +#define __AVX512DQ__ +#endif +#ifndef __AVX512CD__ +#define __AVX512CD__ +#endif + +// Now include the metaheader that includes all x86 intrinsic headers. #include #endif -- 2.50.1