From c8aab0d95a7e96f6814e510c515a2dd727883cd3 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Sat, 10 Jun 2017 20:58:43 +0000
Subject: [PATCH] [X86][AVX512] Added test case for PR32368

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305153 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/X86/pr32368.ll | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 test/CodeGen/X86/pr32368.ll

diff --git a/test/CodeGen/X86/pr32368.ll b/test/CodeGen/X86/pr32368.ll
new file mode 100644
index 00000000000..16102006354
--- /dev/null
+++ b/test/CodeGen/X86/pr32368.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s
+
+define <16 x float> @PR32368(<16 x float>) {
+; CHECK-LABEL: PR32368:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    vpandd {{.*}}(%rip){1to16}, %zmm0, %zmm0
+; CHECK-NEXT:    vaddps %zmm0, %zmm0, %zmm0
+; CHECK-NEXT:    vpandd {{.*}}(%rip){1to16}, %zmm0, %zmm0
+; CHECK-NEXT:    retq
+  %2 = bitcast <16 x float> %0 to <16 x i32>
+  %3 = and <16 x i32> %2, <i32 -292, i32 -292, i32 -292, i32 -292, i32 -292, i32 -292, i32 -292, i32 -292, i32 -292, i32 -292, i32 -292, i32 -292, i32 -292, i32 -292, i32 -292, i32 -292>
+  %4 = bitcast <16 x i32> %3 to <16 x float>
+  %5 = fmul <16 x float> %4, <float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00>
+  %6 = bitcast <16 x float> %5 to <16 x i32>
+  %7 = and <16 x i32> %6, <i32 291, i32 291, i32 291, i32 291, i32 291, i32 291, i32 291, i32 291, i32 291, i32 291, i32 291, i32 291, i32 291, i32 291, i32 291, i32 291>
+  %8 = bitcast <16 x i32> %7 to <16 x float>
+  ret <16 x float> %8
+}
-- 
2.40.0