From c710d1b94cf1c84ba26369fb1e0cf4793303dd4d Mon Sep 17 00:00:00 2001 From: Ivan Maidanski Date: Sun, 13 Jan 2013 16:08:12 +0400 Subject: [PATCH] Fix a typo in comment in msftc/arm.h * src/atomic_ops/sysdeps/msftc/arm.h: Fix a typo in comment (about SWP). --- src/atomic_ops/sysdeps/msftc/arm.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/atomic_ops/sysdeps/msftc/arm.h b/src/atomic_ops/sysdeps/msftc/arm.h index c0195ec..fd6b232 100644 --- a/src/atomic_ops/sysdeps/msftc/arm.h +++ b/src/atomic_ops/sysdeps/msftc/arm.h @@ -80,9 +80,9 @@ AO_store_full(volatile AO_t *addr, AO_t value) #else /* _M_ARM < 6 */ -/* Some slide set, if it has been red correctly, claims that Loads */ +/* Some ARM slide set, if it has been read correctly, claims that Loads */ /* followed by either a Load or a Store are ordered, but nothing */ -/* else is. It appears that SWP is the only simple memory barrier. */ +/* else is. It appears that SWP is the only simple memory barrier. */ #include "../all_atomic_load_store.h" #include "../test_and_set_t_is_ao_t.h" -- 2.50.0