From c68f96368b84e9a911784ff449fc8238808b07c4 Mon Sep 17 00:00:00 2001 From: Max Kazantsev Date: Wed, 4 Oct 2017 06:53:22 +0000 Subject: [PATCH] [IRCE] Temporarily disable unsigned latch conditions by default We have found some corner cases connected to range intersection where IRCE makes a bad thing when the latch condition is unsigned. The fix for that will go as a follow up. This patch temporarily disables IRCE for unsigned latch conditions until the issue is fixed. The unsigned latch conditions were introduced to IRCE by rL310027. Differential Revision: https://reviews.llvm.org/D38529 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314881 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../Scalar/InductiveRangeCheckElimination.cpp | 21 +++++++++ test/Transforms/IRCE/clamp.ll | 2 +- test/Transforms/IRCE/eq_ne.ll | 2 +- .../IRCE/range_intersect_miscompile.ll | 45 +++++++++++++++++++ test/Transforms/IRCE/stride_more_than_1.ll | 2 +- .../IRCE/unsigned_comparisons_ugt.ll | 2 +- .../IRCE/unsigned_comparisons_ult.ll | 2 +- 7 files changed, 71 insertions(+), 5 deletions(-) create mode 100644 test/Transforms/IRCE/range_intersect_miscompile.ll diff --git a/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp b/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp index ce318f7d1de..cc0f2c5bb48 100644 --- a/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp +++ b/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp @@ -79,6 +79,9 @@ static cl::opt MaxExitProbReciprocal("irce-max-exit-prob-reciprocal", static cl::opt SkipProfitabilityChecks("irce-skip-profitability-checks", cl::Hidden, cl::init(false)); +static cl::opt AllowUnsignedLatchCondition("irce-allow-unsigned-latch", + cl::Hidden, cl::init(false)); + static const char *ClonedLoopTag = "irce.loop.clone"; #define DEBUG_TYPE "irce" @@ -889,6 +892,15 @@ LoopStructure::parseLoopStructure(ScalarEvolution &SE, IsSignedPredicate = Pred == ICmpInst::ICMP_SLT || Pred == ICmpInst::ICMP_SGT; + + // FIXME: We temporarily disable unsigned latch conditions by default + // because of found problems with intersecting signed and unsigned ranges. + // We are going to turn it on once the problems are fixed. + if (!IsSignedPredicate && !AllowUnsignedLatchCondition) { + FailureReason = "unsigned latch conditions are explicitly prohibited"; + return None; + } + // The predicate that we need to check that the induction variable lies // within bounds. ICmpInst::Predicate BoundPred = @@ -964,6 +976,15 @@ LoopStructure::parseLoopStructure(ScalarEvolution &SE, IsSignedPredicate = Pred == ICmpInst::ICMP_SLT || Pred == ICmpInst::ICMP_SGT; + + // FIXME: We temporarily disable unsigned latch conditions by default + // because of found problems with intersecting signed and unsigned ranges. + // We are going to turn it on once the problems are fixed. + if (!IsSignedPredicate && !AllowUnsignedLatchCondition) { + FailureReason = "unsigned latch conditions are explicitly prohibited"; + return None; + } + // The predicate that we need to check that the induction variable lies // within bounds. ICmpInst::Predicate BoundPred = diff --git a/test/Transforms/IRCE/clamp.ll b/test/Transforms/IRCE/clamp.ll index dbbd336eb2e..c005b0504b3 100644 --- a/test/Transforms/IRCE/clamp.ll +++ b/test/Transforms/IRCE/clamp.ll @@ -1,4 +1,4 @@ -; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -S < %s 2>&1 | FileCheck %s +; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -irce-allow-unsigned-latch=true -S < %s 2>&1 | FileCheck %s ; The test demonstrates that incorrect behavior of Clamp may lead to incorrect ; calculation of post-loop exit condition. diff --git a/test/Transforms/IRCE/eq_ne.ll b/test/Transforms/IRCE/eq_ne.ll index 7fbed3be0f1..6f63f4cf271 100644 --- a/test/Transforms/IRCE/eq_ne.ll +++ b/test/Transforms/IRCE/eq_ne.ll @@ -1,4 +1,4 @@ -; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -S < %s 2>&1 | FileCheck %s +; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -irce-allow-unsigned-latch=true -S < %s 2>&1 | FileCheck %s ; CHECK: irce: in function test_01: constrained Loop at depth 1 containing: %loop
,%in.bounds ; CHECK: irce: in function test_01u: constrained Loop at depth 1 containing: %loop
,%in.bounds diff --git a/test/Transforms/IRCE/range_intersect_miscompile.ll b/test/Transforms/IRCE/range_intersect_miscompile.ll new file mode 100644 index 00000000000..3a93ad1f396 --- /dev/null +++ b/test/Transforms/IRCE/range_intersect_miscompile.ll @@ -0,0 +1,45 @@ +; RUN: opt -irce -S < %s 2>&1 | FileCheck %s + +; This test demonstrates a miscompile: the outer loop's IV iterates in range of +; [2, 400) and the range check is done against value 331. Due to a bug in range +; intersection IRCE manages to eliminate the range check without inserting a +; postloop, which is incorrect. So far IRCE is prohibited for this case. + +define void @test_01() { + +; CHECK-LABEL: test_01 +; CHECK-NOT: br i1 true + +entry: + br label %loop_header + +loop_header: ; preds = %loop_latch, %entry + %iv = phi i32 [ 2, %entry ], [ %iv_next, %loop_latch ] + %iv.prev = phi i32 [ 1, %entry ], [ %iv, %loop_latch ] + %tmp2 = icmp sgt i32 %iv.prev, -1 + br i1 %tmp2, label %loop_header.split.us, label %exit + +loop_header.split.us: ; preds = %loop_header + br label %inner_loop + +inner_loop: ; preds = %inner_loop, %loop_header.split.us + %inner_iv = phi i32 [ 1, %loop_header.split.us ], [ %inner_iv_next, %inner_loop ] + %inner_iv_next = add nuw nsw i32 %inner_iv, 1 + %inner_cond = icmp ult i32 %inner_iv_next, 31 + br i1 %inner_cond, label %inner_loop, label %range_check_block + +exit: ; preds = %loop_latch, %loop_header + ret void + +range_check_block: ; preds = %inner_loop + %range_check = icmp slt i32 %iv, 331 + br i1 %range_check, label %loop_latch, label %deopt + +loop_latch: ; preds = %range_check_block + %iv_next = add i32 %iv, 1 + %loop_cond = icmp ult i32 %iv_next, 400 + br i1 %loop_cond, label %loop_header, label %exit + +deopt: ; preds = %range_check_block + ret void +} diff --git a/test/Transforms/IRCE/stride_more_than_1.ll b/test/Transforms/IRCE/stride_more_than_1.ll index 0918aeb8402..de13a648a51 100644 --- a/test/Transforms/IRCE/stride_more_than_1.ll +++ b/test/Transforms/IRCE/stride_more_than_1.ll @@ -1,4 +1,4 @@ -; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -S < %s 2>&1 | FileCheck %s +; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -irce-allow-unsigned-latch=true -S < %s 2>&1 | FileCheck %s ; CHECK: irce: in function test_01: constrained Loop at depth 1 containing: %loop
,%in.bounds ; CHECK: irce: in function test_02: constrained Loop at depth 1 containing: %loop
,%in.bounds diff --git a/test/Transforms/IRCE/unsigned_comparisons_ugt.ll b/test/Transforms/IRCE/unsigned_comparisons_ugt.ll index 183706a2e6c..72a56ff17af 100644 --- a/test/Transforms/IRCE/unsigned_comparisons_ugt.ll +++ b/test/Transforms/IRCE/unsigned_comparisons_ugt.ll @@ -1,4 +1,4 @@ -; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -S < %s 2>&1 | FileCheck %s +; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -irce-allow-unsigned-latch=true -S < %s 2>&1 | FileCheck %s ; CHECK: irce: in function test_01: constrained Loop at depth 1 containing: %loop
,%in.bounds ; CHECK: irce: in function test_02: constrained Loop at depth 1 containing: %loop
,%in.bounds diff --git a/test/Transforms/IRCE/unsigned_comparisons_ult.ll b/test/Transforms/IRCE/unsigned_comparisons_ult.ll index 155b27bb635..34765572e5f 100644 --- a/test/Transforms/IRCE/unsigned_comparisons_ult.ll +++ b/test/Transforms/IRCE/unsigned_comparisons_ult.ll @@ -1,4 +1,4 @@ -; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -S < %s 2>&1 | FileCheck %s +; RUN: opt -verify-loop-info -irce-print-changed-loops -irce -irce-allow-unsigned-latch=true -S < %s 2>&1 | FileCheck %s ; CHECK: irce: in function test_01: constrained Loop at depth 1 containing: %loop
,%in.bounds ; CHECK: irce: in function test_02: constrained Loop at depth 1 containing: %loop
,%in.bounds -- 2.50.1