From be4ce37f895574db32a8da2ccd2395ed88e3d436 Mon Sep 17 00:00:00 2001 From: "Diogo N. Sampaio" Date: Wed, 10 Jul 2019 09:58:03 +0000 Subject: [PATCH] [NFC][AArch64] Fix vector vsqadd intrinsics operands Summary: Change the vsqadd vector instrinsics to have the second argument as signed values, not unsigned, accordingly to https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics Reviewers: LukeCheeseman, ostannard Reviewed By: ostannard Subscribers: javed.absar, kristof.beyls, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D64210 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@365608 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/clang/Basic/arm_neon.td | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/clang/Basic/arm_neon.td b/include/clang/Basic/arm_neon.td index 8b4fb4653b..2cf8b0a890 100644 --- a/include/clang/Basic/arm_neon.td +++ b/include/clang/Basic/arm_neon.td @@ -707,7 +707,7 @@ def SUQADD : SInst<"vuqadd", "ddd", "csilQcQsQiQl">; //////////////////////////////////////////////////////////////////////////////// // Unsigned Saturating Accumulated of Signed Value -def USQADD : SInst<"vsqadd", "ddd", "UcUsUiUlQUcQUsQUiQUl">; +def USQADD : SInst<"vsqadd", "ddx", "UcUsUiUlQUcQUsQUiQUl">; //////////////////////////////////////////////////////////////////////////////// // Reciprocal/Sqrt -- 2.40.0