From bca1a1aab39f0e3d2448d5dfc5e2591815aba047 Mon Sep 17 00:00:00 2001 From: Mandeep Singh Grang Date: Mon, 17 Jul 2017 00:05:32 +0000 Subject: [PATCH] [COFF, ARM64] Add initial relocation types Reviewers: compnerd, ruiu, rnk Reviewed By: compnerd Subscribers: mstorsjo, aemerson, javed.absar, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D34857 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308154 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../MCTargetDesc/AArch64AsmBackend.cpp | 6 +- .../AArch64WinCOFFObjectWriter.cpp | 61 +++++++++++++++---- test/MC/AArch64/coff-relocations.s | 52 ++++++++++++++++ 3 files changed, 107 insertions(+), 12 deletions(-) create mode 100644 test/MC/AArch64/coff-relocations.s diff --git a/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp b/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp index a7a7daf4b4a..2bd0cbf9f7c 100644 --- a/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp +++ b/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp @@ -104,8 +104,9 @@ static unsigned getFixupKindNumBytes(unsigned Kind) { case FK_Data_1: return 1; - case FK_Data_2: case AArch64::fixup_aarch64_movw: + case FK_Data_2: + case FK_SecRel_2: return 2; case AArch64::fixup_aarch64_pcrel_branch14: @@ -124,6 +125,7 @@ static unsigned getFixupKindNumBytes(unsigned Kind) { case AArch64::fixup_aarch64_pcrel_branch26: case AArch64::fixup_aarch64_pcrel_call26: case FK_Data_4: + case FK_SecRel_4: return 4; case FK_Data_8: @@ -218,6 +220,8 @@ static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, case FK_Data_2: case FK_Data_4: case FK_Data_8: + case FK_SecRel_2: + case FK_SecRel_4: return Value; } } diff --git a/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp b/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp index 7862a03e771..31762b9e4cd 100644 --- a/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp +++ b/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp @@ -27,8 +27,7 @@ namespace { class AArch64WinCOFFObjectWriter : public MCWinCOFFObjectTargetWriter { public: AArch64WinCOFFObjectWriter() - : MCWinCOFFObjectTargetWriter(COFF::IMAGE_FILE_MACHINE_ARM64) { - } + : MCWinCOFFObjectTargetWriter(COFF::IMAGE_FILE_MACHINE_ARM64) {} ~AArch64WinCOFFObjectWriter() override = default; @@ -36,19 +35,59 @@ public: const MCFixup &Fixup, bool IsCrossSection, const MCAsmBackend &MAB) const override; - bool recordRelocation(const MCFixup &) const override; + bool recordRelocation(const MCFixup &) const override; }; } // end anonymous namespace -unsigned -AArch64WinCOFFObjectWriter::getRelocType(MCContext &Ctx, - const MCValue &Target, - const MCFixup &Fixup, - bool IsCrossSection, - const MCAsmBackend &MAB) const { - const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind()); - report_fatal_error(Twine("unsupported relocation type: ") + Info.Name); +unsigned AArch64WinCOFFObjectWriter::getRelocType( + MCContext &Ctx, const MCValue &Target, const MCFixup &Fixup, + bool IsCrossSection, const MCAsmBackend &MAB) const { + auto Modifier = Target.isAbsolute() ? MCSymbolRefExpr::VK_None + : Target.getSymA()->getKind(); + + switch (static_cast(Fixup.getKind())) { + default: { + const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind()); + report_fatal_error(Twine("unsupported relocation type: ") + Info.Name); + } + + case FK_Data_4: + switch (Modifier) { + default: + return COFF::IMAGE_REL_ARM64_ADDR32; + case MCSymbolRefExpr::VK_COFF_IMGREL32: + return COFF::IMAGE_REL_ARM64_ADDR32NB; + case MCSymbolRefExpr::VK_SECREL: + return COFF::IMAGE_REL_ARM64_SECREL; + } + + case FK_Data_8: + return COFF::IMAGE_REL_ARM64_ADDR64; + + case FK_SecRel_2: + return COFF::IMAGE_REL_ARM64_SECTION; + + case FK_SecRel_4: + return COFF::IMAGE_REL_ARM64_SECREL; + + case AArch64::fixup_aarch64_add_imm12: + return COFF::IMAGE_REL_ARM64_PAGEOFFSET_12A; + + case AArch64::fixup_aarch64_ldst_imm12_scale1: + case AArch64::fixup_aarch64_ldst_imm12_scale2: + case AArch64::fixup_aarch64_ldst_imm12_scale4: + case AArch64::fixup_aarch64_ldst_imm12_scale8: + case AArch64::fixup_aarch64_ldst_imm12_scale16: + return COFF::IMAGE_REL_ARM64_PAGEOFFSET_12L; + + case AArch64::fixup_aarch64_pcrel_adrp_imm21: + return COFF::IMAGE_REL_ARM64_PAGEBASE_REL21; + + case AArch64::fixup_aarch64_pcrel_branch26: + case AArch64::fixup_aarch64_pcrel_call26: + return COFF::IMAGE_REL_ARM64_BRANCH26; + } } bool AArch64WinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const { diff --git a/test/MC/AArch64/coff-relocations.s b/test/MC/AArch64/coff-relocations.s new file mode 100644 index 00000000000..221ecfd4cd4 --- /dev/null +++ b/test/MC/AArch64/coff-relocations.s @@ -0,0 +1,52 @@ +; RUN: llvm-mc -triple aarch64-windows -filetype obj -o - %s | \ +; RUN: llvm-readobj -r - | FileCheck %s + +; IMAGE_REL_ARM64_ADDR32 +.Linfo_foo: + .asciz "foo" + .long foo + +; IMAGE_REL_ARM64_ADDR32NB +.long func@IMGREL + +; IMAGE_REL_ARM64_ADDR64 +.globl struc +struc: + .quad arr + +; IMAGE_REL_ARM64_BRANCH26 +b target + +; IMAGE_REL_ARM64_PAGEBASE_REL21 +adrp x0, foo + +; IMAGE_REL_ARM64_PAGEOFFSET_12A +add x0, x0, :lo12:foo + +; IMAGE_REL_ARM64_PAGEOFFSET_12L +ldr x0, [x0, :lo12:foo] + +; IMAGE_REL_ARM64_SECREL +.secrel32 .Linfo_bar +.Linfo_bar: + +; IMAGE_REL_ARM64_SECTION +.secidx func + + +; CHECK: Format: COFF-ARM64 +; CHECK: Arch: aarch64 +; CHECK: AddressSize: 64bit +; CHECK: Relocations [ +; CHECK: Section (1) .text { +; CHECK: 0x4 IMAGE_REL_ARM64_ADDR32 foo +; CHECK: 0x8 IMAGE_REL_ARM64_ADDR32NB func +; CHECK: 0xC IMAGE_REL_ARM64_ADDR64 arr +; CHECK: 0x14 IMAGE_REL_ARM64_BRANCH26 target +; CHECK: 0x18 IMAGE_REL_ARM64_PAGEBASE_REL21 foo +; CHECK: 0x1C IMAGE_REL_ARM64_PAGEOFFSET_12A foo +; CHECK: 0x20 IMAGE_REL_ARM64_PAGEOFFSET_12L foo +; CHECK: 0x24 IMAGE_REL_ARM64_SECREL .text +; CHECK: 0x28 IMAGE_REL_ARM64_SECTION func +; CHECK: } +; CHECK: ] -- 2.40.0