From b9bba8a9e8b2aa6f0a7e482fc871942438c48fcd Mon Sep 17 00:00:00 2001 From: Alexandros Lamprineas Date: Wed, 14 Jun 2017 15:00:08 +0000 Subject: [PATCH] Revert "[ARM] Support constant pools in data when generating execute-only code." This reverts commit 3a204faa093c681a1e96c5e0622f50649b761ee0. I've upset a buildbot which runs the address sanitizer: ERROR: AddressSanitizer: stack-use-after-scope lib/Target/ARM/ARMISelLowering.cpp:2690 That Twine variable is used illegally. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305390 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMAsmPrinter.cpp | 3 -- lib/Target/ARM/ARMISelLowering.cpp | 53 +++++++++--------------------- lib/Target/ARM/ARMISelLowering.h | 2 -- test/CodeGen/ARM/constantfp.ll | 50 ---------------------------- 4 files changed, 15 insertions(+), 93 deletions(-) diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp index 90f635c8125..f9da036c7e4 100644 --- a/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/ARMAsmPrinter.cpp @@ -1504,9 +1504,6 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { return; } case ARM::CONSTPOOL_ENTRY: { - if (Subtarget->genExecuteOnly()) - llvm_unreachable("execute-only should not generate constant pools"); - /// CONSTPOOL_ENTRY - This instruction represents a floating constant pool /// in the function. The first operand is the ID# for this instruction, the /// second is the index into the MachineConstantPool that this is, the third diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 5c48e2a5a92..5b2d093e8f0 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -2669,34 +2669,12 @@ static SDValue LowerWRITE_REGISTER(SDValue Op, SelectionDAG &DAG) { // Select(N) returns N. So the raw TargetGlobalAddress nodes, etc. can only // be used to form addressing mode. These wrapped nodes will be selected // into MOVi. -SDValue ARMTargetLowering::LowerConstantPool(SDValue Op, - SelectionDAG &DAG) const { +static SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) { EVT PtrVT = Op.getValueType(); // FIXME there is no actual debug info here SDLoc dl(Op); ConstantPoolSDNode *CP = cast(Op); SDValue Res; - - // When generating execute-only code Constant Pools must be promoted to the - // global data section. It's a bit ugly that we can't share them across basic - // blocks, but this way we guarantee that execute-only behaves correct with - // position-independent addressing modes. - if (Subtarget->genExecuteOnly()) { - auto AFI = DAG.getMachineFunction().getInfo(); - auto T = const_cast(CP->getType()); - auto C = const_cast(CP->getConstVal()); - auto M = const_cast(DAG.getMachineFunction(). - getFunction()->getParent()); - auto L = Twine(DAG.getDataLayout().getPrivateGlobalPrefix()) + "CP" + - Twine(DAG.getMachineFunction().getFunctionNumber()) + "_" + - Twine(AFI->createPICLabelUId()); - auto GV = new GlobalVariable(*M, T, /*isConstant=*/true, - GlobalVariable::InternalLinkage, C, L); - SDValue GA = DAG.getTargetGlobalAddress(dyn_cast(GV), - dl, PtrVT); - return LowerGlobalAddress(GA, DAG); - } - if (CP->isMachineConstantPoolEntry()) Res = DAG.getTargetConstantPool(CP->getMachineCPVal(), PtrVT, CP->getAlignment()); @@ -3140,19 +3118,6 @@ static bool isReadOnly(const GlobalValue *GV) { isa(GV); } -SDValue ARMTargetLowering::LowerGlobalAddress(SDValue Op, - SelectionDAG &DAG) const { - switch (Subtarget->getTargetTriple().getObjectFormat()) { - default: llvm_unreachable("unknown object format"); - case Triple::COFF: - return LowerGlobalAddressWindows(Op, DAG); - case Triple::ELF: - return LowerGlobalAddressELF(Op, DAG); - case Triple::MachO: - return LowerGlobalAddressDarwin(Op, DAG); - } -} - SDValue ARMTargetLowering::LowerGlobalAddressELF(SDValue Op, SelectionDAG &DAG) const { EVT PtrVT = getPointerTy(DAG.getDataLayout()); @@ -7669,9 +7634,21 @@ SDValue ARMTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const { switch (Op.getOpcode()) { default: llvm_unreachable("Don't know how to custom lower this!"); case ISD::WRITE_REGISTER: return LowerWRITE_REGISTER(Op, DAG); - case ISD::ConstantPool: return LowerConstantPool(Op, DAG); + case ISD::ConstantPool: + if (Subtarget->genExecuteOnly()) + llvm_unreachable("execute-only should not generate constant pools"); + return LowerConstantPool(Op, DAG); case ISD::BlockAddress: return LowerBlockAddress(Op, DAG); - case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); + case ISD::GlobalAddress: + switch (Subtarget->getTargetTriple().getObjectFormat()) { + default: llvm_unreachable("unknown object format"); + case Triple::COFF: + return LowerGlobalAddressWindows(Op, DAG); + case Triple::ELF: + return LowerGlobalAddressELF(Op, DAG); + case Triple::MachO: + return LowerGlobalAddressDarwin(Op, DAG); + } case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG); case ISD::SELECT: return LowerSELECT(Op, DAG); case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); diff --git a/lib/Target/ARM/ARMISelLowering.h b/lib/Target/ARM/ARMISelLowering.h index 5044134f5b1..26da528c19e 100644 --- a/lib/Target/ARM/ARMISelLowering.h +++ b/lib/Target/ARM/ARMISelLowering.h @@ -601,8 +601,6 @@ class InstrItineraryData; SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *Subtarget) const; SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; - SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const; - SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; SDValue LowerGlobalAddressDarwin(SDValue Op, SelectionDAG &DAG) const; SDValue LowerGlobalAddressELF(SDValue Op, SelectionDAG &DAG) const; SDValue LowerGlobalAddressWindows(SDValue Op, SelectionDAG &DAG) const; diff --git a/test/CodeGen/ARM/constantfp.ll b/test/CodeGen/ARM/constantfp.ll index 0b431f47f50..b5aeadc05eb 100644 --- a/test/CodeGen/ARM/constantfp.ll +++ b/test/CodeGen/ARM/constantfp.ll @@ -11,9 +11,6 @@ ; RUN: llc -mtriple=thumbv7meb -arm-execute-only -mcpu=cortex-m4 %s -o - \ ; RUN: | FileCheck --check-prefix=CHECK-XO-FLOAT --check-prefix=CHECK-XO-DOUBLE-BE %s -; RUN: llc -mtriple=thumbv7m -arm-execute-only -mcpu=cortex-m4 -relocation-model=ropi %s -o - \ -; RUN: | FileCheck --check-prefix=CHECK-XO-ROPI %s - ; RUN: llc -mtriple=thumbv8m.main -mattr=fp-armv8 %s -o - \ ; RUN: | FileCheck --check-prefix=CHECK-NO-XO %s @@ -23,8 +20,6 @@ ; RUN: llc -mtriple=thumbv8m.maineb -arm-execute-only -mattr=fp-armv8 %s -o - \ ; RUN: | FileCheck --check-prefix=CHECK-XO-FLOAT --check-prefix=CHECK-XO-DOUBLE-BE %s -; RUN: llc -mtriple=thumbv8m.main -arm-execute-only -mattr=fp-armv8 -relocation-model=ropi %s -o - \ -; RUN: | FileCheck --check-prefix=CHECK-XO-ROPI %s define arm_aapcs_vfpcc float @test_vmov_f32() { ; CHECK-LABEL: test_vmov_f32: @@ -181,48 +176,3 @@ define arm_aapcs_vfpcc double @lower_const_f64_xo() { ; CHECK-XO-DOUBLE-BE-NOT: vldr ret double 3.140000e-01 } - -; This is a target independent optimization, performed by the -; DAG Combiner, which promotes floating point literals into -; constant pools: -; -; (a cond b) ? 1.0f : 2.0f -> load (ConstPoolAddr + ((a cond b) ? 0 : 4) -; -; We need to make sure that the constant pools are placed in -; the data section when generating execute-only code: - -define arm_aapcs_vfpcc float @lower_fpconst_select(float %f) { - -; CHECK-NO-XO-LABEL: lower_fpconst_select -; CHECK-NO-XO: adr [[REG:r[0-9]+]], [[LABEL:.?LCPI[0-9]+_[0-9]+]] -; CHECK-NO-XO: vldr {{s[0-9]+}}, {{[[]}}[[REG]]{{[]]}} -; CHECK-NO-XO-NOT: .rodata -; CHECK-NO-XO: [[LABEL]]: -; CHECK-NO-XO: .long 1335165689 -; CHECK-NO-XO: .long 1307470632 - -; CHECK-XO-FLOAT-LABEL: lower_fpconst_select -; CHECK-XO-FLOAT: movw [[REG:r[0-9]+]], :lower16:[[LABEL:.?LCP[0-9]+_[0-9]+]] -; CHECK-XO-FLOAT: movt [[REG]], :upper16:[[LABEL]] -; CHECK-XO-FLOAT: vldr {{s[0-9]+}}, {{[[]}}[[REG]]{{[]]}} -; CHECK-XO-FLOAT: .rodata -; CHECK-XO-FLOAT-NOT: .text -; CHECK-XO-FLOAT: [[LABEL]]: -; CHECK-XO-FLOAT: .long 1335165689 -; CHECK-XO-FLOAT: .long 1307470632 - -; CHECK-XO-ROPI-LABEL: lower_fpconst_select -; CHECK-XO-ROPI: movw [[REG:r[0-9]+]], :lower16:([[LABEL1:.?LCP[0-9]+_[0-9]+]]-([[LABEL2:.?LPC[0-9]+_[0-9]+]]+4)) -; CHECK-XO-ROPI: movt [[REG]], :upper16:([[LABEL1]]-([[LABEL2]]+4)) -; CHECK-XO-ROPI: [[LABEL2]]: -; CHECK-XO-ROPI: vldr {{s[0-9]+}}, {{[[]}}[[REG]]{{[]]}} -; CHECK-XO-ROPI: .rodata -; CHECK-XO-ROPI-NOT: .text -; CHECK-XO-ROPI: [[LABEL1]]: -; CHECK-XO-ROPI: .long 1335165689 -; CHECK-XO-ROPI: .long 1307470632 - - %cmp = fcmp nnan oeq float %f, 0.000000e+00 - %sel = select i1 %cmp, float 5.000000e+08, float 5.000000e+09 - ret float %sel -} -- 2.40.0