From b8fa7c40ea09cb003852098b232c5c8d8a6c2fc3 Mon Sep 17 00:00:00 2001 From: Stanislav Mekhanoshin Date: Thu, 19 Jan 2017 21:26:22 +0000 Subject: [PATCH] [AMDGPU] Add exec copy to LiveIntervals in SILowerControlFlow::emitElse This instruction is missing from LiveIntervals. I'm not aware of any problems because of this though. Differential Revision: https://reviews.llvm.org/D28879 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292521 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AMDGPU/SILowerControlFlow.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/Target/AMDGPU/SILowerControlFlow.cpp b/lib/Target/AMDGPU/SILowerControlFlow.cpp index 4a7dff44dfc..0a0faf36c22 100644 --- a/lib/Target/AMDGPU/SILowerControlFlow.cpp +++ b/lib/Target/AMDGPU/SILowerControlFlow.cpp @@ -219,7 +219,8 @@ void SILowerControlFlow::emitElse(MachineInstr &MI) { // tied. In order to correctly tie the registers, split this into a copy of // the src like it does. unsigned CopyReg = MRI->createVirtualRegister(&AMDGPU::SReg_64RegClass); - BuildMI(MBB, Start, DL, TII->get(AMDGPU::COPY), CopyReg) + MachineInstr *CopyExec = + BuildMI(MBB, Start, DL, TII->get(AMDGPU::COPY), CopyReg) .add(MI.getOperand(1)); // Saved EXEC // This must be inserted before phis and any spill code inserted before the @@ -261,6 +262,7 @@ void SILowerControlFlow::emitElse(MachineInstr &MI) { LIS->RemoveMachineInstrFromMaps(MI); MI.eraseFromParent(); + LIS->InsertMachineInstrInMaps(*CopyExec); LIS->InsertMachineInstrInMaps(*OrSaveExec); LIS->InsertMachineInstrInMaps(*Xor); -- 2.50.1