From b8b6ac5e09e23975954b335f45218a1194f6a642 Mon Sep 17 00:00:00 2001 From: Quentin Colombet Date: Mon, 9 May 2016 19:50:30 +0000 Subject: [PATCH] [X86] Drop the 64-bit alignment for LOW32_ADDR_ACCESS register class. The only 64-bit register in that register class is RIP and it will not get spilled in the current ABIs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268963 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86RegisterInfo.td | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/Target/X86/X86RegisterInfo.td b/lib/Target/X86/X86RegisterInfo.td index 797ff4f2e8e..29ce2860537 100644 --- a/lib/Target/X86/X86RegisterInfo.td +++ b/lib/Target/X86/X86RegisterInfo.td @@ -421,11 +421,12 @@ def GR64_NOREX_NOSP : RegisterClass<"X86", [i64], 64, // In such cases, it is fine to use RIP as we are sure the 32 high // bits are not set. We do not need variants for NOSP as RIP is not // allowed there. -// Alignment is 64 because we have RIP. +// RIP is not spilled anywhere for now, so stick to 32-bit alignment +// to save on memory space. // FIXME: We could allow all 64bit registers, but we would need // something to check that the 32 high bits are not set, // which we do not have right now. -def LOW32_ADDR_ACCESS : RegisterClass<"X86", [i32], 64, (add GR32, RIP)>; +def LOW32_ADDR_ACCESS : RegisterClass<"X86", [i32], 32, (add GR32, RIP)>; // When RBP is used as a base pointer in a 32-bit addresses environement, // this is also safe to use the full register to access addresses. -- 2.50.1