From b4bf68e4e8a7b5123ccff4f638a7477539807773 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Thu, 9 Feb 2017 06:51:02 +0000 Subject: [PATCH] [X86] Remove the HLE feature flag. We only implemented it for one of the 3 HLE instructions and that instruction is also under the RTM flag. Clang only implements the RTM flag from its command line. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294562 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Support/Host.cpp | 1 - lib/Target/X86/X86.td | 3 --- lib/Target/X86/X86InstrInfo.td | 2 -- lib/Target/X86/X86InstrTSX.td | 10 +++++----- lib/Target/X86/X86Subtarget.cpp | 1 - lib/Target/X86/X86Subtarget.h | 4 ---- 6 files changed, 5 insertions(+), 16 deletions(-) diff --git a/lib/Support/Host.cpp b/lib/Support/Host.cpp index 26c54ab9f6c..a87399380a7 100644 --- a/lib/Support/Host.cpp +++ b/lib/Support/Host.cpp @@ -1366,7 +1366,6 @@ bool sys::getHostCPUFeatures(StringMap &Features) { Features["fsgsbase"] = HasLeaf7 && ((EBX >> 0) & 1); Features["sgx"] = HasLeaf7 && ((EBX >> 2) & 1); Features["bmi"] = HasLeaf7 && ((EBX >> 3) & 1); - Features["hle"] = HasLeaf7 && ((EBX >> 4) & 1); Features["bmi2"] = HasLeaf7 && ((EBX >> 8) & 1); Features["rtm"] = HasLeaf7 && ((EBX >> 11) & 1); Features["rdseed"] = HasLeaf7 && ((EBX >> 18) & 1); diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td index 59c9998fe70..78ec10f7215 100644 --- a/lib/Target/X86/X86.td +++ b/lib/Target/X86/X86.td @@ -187,8 +187,6 @@ def FeatureBMI2 : SubtargetFeature<"bmi2", "HasBMI2", "true", "Support BMI2 instructions">; def FeatureRTM : SubtargetFeature<"rtm", "HasRTM", "true", "Support RTM instructions">; -def FeatureHLE : SubtargetFeature<"hle", "HasHLE", "true", - "Support HLE">; def FeatureADX : SubtargetFeature<"adx", "HasADX", "true", "Support ADX instructions">; def FeatureSHA : SubtargetFeature<"sha", "HasSHA", "true", @@ -493,7 +491,6 @@ def HSWFeatures : ProcessorFeatures; diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 2ccaf6aaed2..6f5aa813ea5 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -850,8 +850,6 @@ def HasVBMI : Predicate<"Subtarget->hasVBMI()">, def HasIFMA : Predicate<"Subtarget->hasIFMA()">, AssemblerPredicate<"FeatureIFMA", "AVX-512 IFMA ISA">; def HasRTM : Predicate<"Subtarget->hasRTM()">; -def HasHLE : Predicate<"Subtarget->hasHLE()">; -def HasTSX : Predicate<"Subtarget->hasRTM() || Subtarget->hasHLE()">; def HasADX : Predicate<"Subtarget->hasADX()">; def HasSHA : Predicate<"Subtarget->hasSHA()">; def HasPRFCHW : Predicate<"Subtarget->hasPRFCHW()">; diff --git a/lib/Target/X86/X86InstrTSX.td b/lib/Target/X86/X86InstrTSX.td index 7267d752653..38ac8be9448 100644 --- a/lib/Target/X86/X86InstrTSX.td +++ b/lib/Target/X86/X86InstrTSX.td @@ -25,9 +25,9 @@ def XBEGIN : I<0, Pseudo, (outs GR32:$dst), (ins), let isBranch = 1, isTerminator = 1, Defs = [EAX] in { def XBEGIN_2 : Ii16PCRel<0xc7, MRM_F8, (outs), (ins brtarget16:$dst), - "xbegin\t$dst", []>, OpSize16, Requires<[HasRTM]>; + "xbegin\t$dst", []>, OpSize16; def XBEGIN_4 : Ii32PCRel<0xc7, MRM_F8, (outs), (ins brtarget32:$dst), - "xbegin\t$dst", []>, OpSize32, Requires<[HasRTM]>; + "xbegin\t$dst", []>, OpSize32; } def XEND : I<0x01, MRM_D5, (outs), (ins), @@ -35,7 +35,7 @@ def XEND : I<0x01, MRM_D5, (outs), (ins), let Defs = [EFLAGS] in def XTEST : I<0x01, MRM_D6, (outs), (ins), - "xtest", [(set EFLAGS, (X86xtest))]>, TB, Requires<[HasTSX]>; + "xtest", [(set EFLAGS, (X86xtest))]>, TB, Requires<[HasRTM]>; def XABORT : Ii8<0xc6, MRM_F8, (outs), (ins i8imm:$imm), "xabort\t$imm", @@ -44,7 +44,7 @@ def XABORT : Ii8<0xc6, MRM_F8, (outs), (ins i8imm:$imm), // HLE prefixes let isAsmParserOnly = 1 in { -def XACQUIRE_PREFIX : I<0xF2, RawFrm, (outs), (ins), "xacquire", []>, Requires<[HasHLE]>; -def XRELEASE_PREFIX : I<0xF3, RawFrm, (outs), (ins), "xrelease", []>, Requires<[HasHLE]>; +def XACQUIRE_PREFIX : I<0xF2, RawFrm, (outs), (ins), "xacquire", []>; +def XRELEASE_PREFIX : I<0xF3, RawFrm, (outs), (ins), "xrelease", []>; } diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp index e09e378b3f6..dfe22faef02 100644 --- a/lib/Target/X86/X86Subtarget.cpp +++ b/lib/Target/X86/X86Subtarget.cpp @@ -275,7 +275,6 @@ void X86Subtarget::initializeEnvironment() { HasVBMI = false; HasIFMA = false; HasRTM = false; - HasHLE = false; HasERI = false; HasCDI = false; HasPFI = false; diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h index a320055ec28..a82d92c2854 100644 --- a/lib/Target/X86/X86Subtarget.h +++ b/lib/Target/X86/X86Subtarget.h @@ -154,9 +154,6 @@ protected: /// Processor has RTM instructions. bool HasRTM; - /// Processor has HLE. - bool HasHLE; - /// Processor has ADX instructions. bool HasADX; @@ -450,7 +447,6 @@ public: bool hasVBMI() const { return HasVBMI; } bool hasIFMA() const { return HasIFMA; } bool hasRTM() const { return HasRTM; } - bool hasHLE() const { return HasHLE; } bool hasADX() const { return HasADX; } bool hasSHA() const { return HasSHA; } bool hasPRFCHW() const { return HasPRFCHW; } -- 2.50.1