From b39bdec1f4096fbc5d90a72be4a31bde871b7906 Mon Sep 17 00:00:00 2001 From: Jessica Paquette Date: Fri, 19 Apr 2019 21:44:16 +0000 Subject: [PATCH] [GlobalISel] Add a G_FRINT opcode Equivalent to SelectionDAG's frint node. Differential Revision: https://reviews.llvm.org/D60891 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358785 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Support/TargetOpcodes.def | 3 +++ include/llvm/Target/GenericOpcodes.td | 7 +++++++ include/llvm/Target/GlobalISel/SelectionDAGCompat.td | 1 + .../AArch64/GlobalISel/legalizer-info-validation.mir | 3 +++ 4 files changed, 14 insertions(+) diff --git a/include/llvm/Support/TargetOpcodes.def b/include/llvm/Support/TargetOpcodes.def index 66122749278..3513a434784 100644 --- a/include/llvm/Support/TargetOpcodes.def +++ b/include/llvm/Support/TargetOpcodes.def @@ -536,6 +536,9 @@ HANDLE_TARGET_OPCODE(G_FSQRT) /// Floating point floor. HANDLE_TARGET_OPCODE(G_FFLOOR) +/// Floating point round to next integer. +HANDLE_TARGET_OPCODE(G_FRINT) + /// Generic AddressSpaceCast. HANDLE_TARGET_OPCODE(G_ADDRSPACE_CAST) diff --git a/include/llvm/Target/GenericOpcodes.td b/include/llvm/Target/GenericOpcodes.td index e4b452e91b9..ede632b3385 100644 --- a/include/llvm/Target/GenericOpcodes.td +++ b/include/llvm/Target/GenericOpcodes.td @@ -592,6 +592,13 @@ def G_FFLOOR : GenericInstruction { let hasSideEffects = 0; } +// Floating point round to next integer. +def G_FRINT : GenericInstruction { + let OutOperandList = (outs type0:$dst); + let InOperandList = (ins type0:$src1); + let hasSideEffects = 0; +} + //------------------------------------------------------------------------------ // Opcodes for LLVM Intrinsics //------------------------------------------------------------------------------ diff --git a/include/llvm/Target/GlobalISel/SelectionDAGCompat.td b/include/llvm/Target/GlobalISel/SelectionDAGCompat.td index d6c7c6e7a39..a6eb3b58f81 100644 --- a/include/llvm/Target/GlobalISel/SelectionDAGCompat.td +++ b/include/llvm/Target/GlobalISel/SelectionDAGCompat.td @@ -95,6 +95,7 @@ def : GINodeEquiv; def : GINodeEquiv; def : GINodeEquiv; def : GINodeEquiv; +def : GINodeEquiv; // Broadly speaking G_LOAD is equivalent to ISD::LOAD but there are some // complications that tablegen must take care of. For example, Predicates such diff --git a/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir b/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir index 88b6d5753df..1e198e4a683 100644 --- a/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir +++ b/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir @@ -346,6 +346,9 @@ # DEBUG: .. type index coverage check SKIPPED: user-defined predicate detected # # DEBUG-NEXT: G_FFLOOR (opcode {{[0-9]+}}): 1 type index +# DEBUG: .. type index coverage check SKIPPED: user-defined predicate detected +# +# DEBUG-NEXT: G_FRINT (opcode 146): 1 type index # DEBUG: .. type index coverage check SKIPPED: no rules defined # CHECK-NOT: ill-defined -- 2.40.0