From b33cfe08b5f52ff85a3fb7026ce39987b4be9778 Mon Sep 17 00:00:00 2001 From: Peter Johnson Date: Tue, 3 Oct 2006 16:24:30 +0000 Subject: [PATCH] Fix #80: xchg ax, ax or xchg eax, eax in 64-bit mode should not use 90h opcode. svn path=/trunk/yasm/; revision=1638 --- modules/arch/x86/tests/Makefile.inc | 2 ++ modules/arch/x86/tests/xchg64.asm | 10 ++++++++++ modules/arch/x86/tests/xchg64.hex | 17 +++++++++++++++++ modules/arch/x86/x86id.c | 4 ++++ 4 files changed, 33 insertions(+) create mode 100644 modules/arch/x86/tests/xchg64.asm create mode 100644 modules/arch/x86/tests/xchg64.hex diff --git a/modules/arch/x86/tests/Makefile.inc b/modules/arch/x86/tests/Makefile.inc index 3f94a449..95010f7b 100644 --- a/modules/arch/x86/tests/Makefile.inc +++ b/modules/arch/x86/tests/Makefile.inc @@ -155,6 +155,8 @@ EXTRA_DIST += modules/arch/x86/tests/vmx-err.asm EXTRA_DIST += modules/arch/x86/tests/vmx-err.errwarn EXTRA_DIST += modules/arch/x86/tests/x86label.asm EXTRA_DIST += modules/arch/x86/tests/x86label.hex +EXTRA_DIST += modules/arch/x86/tests/xchg64.asm +EXTRA_DIST += modules/arch/x86/tests/xchg64.hex EXTRA_DIST += modules/arch/x86/tests/xmm64.asm EXTRA_DIST += modules/arch/x86/tests/xmm64.hex diff --git a/modules/arch/x86/tests/xchg64.asm b/modules/arch/x86/tests/xchg64.asm new file mode 100644 index 00000000..d6a13949 --- /dev/null +++ b/modules/arch/x86/tests/xchg64.asm @@ -0,0 +1,10 @@ +[bits 64] +xchg ax, ax +xchg ax, bx +xchg bx, ax +xchg eax, eax +xchg eax, ebx +xchg ebx, eax +xchg rax, rax +xchg rax, rbx +xchg rbx, rax diff --git a/modules/arch/x86/tests/xchg64.hex b/modules/arch/x86/tests/xchg64.hex new file mode 100644 index 00000000..b1965407 --- /dev/null +++ b/modules/arch/x86/tests/xchg64.hex @@ -0,0 +1,17 @@ +66 +87 +c0 +66 +93 +66 +93 +87 +c0 +93 +93 +48 +90 +48 +93 +48 +93 diff --git a/modules/arch/x86/x86id.c b/modules/arch/x86/x86id.c index 1e73cb27..94677beb 100644 --- a/modules/arch/x86/x86id.c +++ b/modules/arch/x86/x86id.c @@ -732,6 +732,8 @@ static const x86_insn_info xchg_insn[] = { {OPT_RM|OPS_8|OPS_Relaxed|OPA_EA, OPT_Reg|OPS_8|OPA_Spare, 0} }, { CPU_Any, MOD_GasSufB, 0, 0, 0, 1, {0x86, 0, 0}, 0, 2, {OPT_Reg|OPS_8|OPA_Spare, OPT_RM|OPS_8|OPS_Relaxed|OPA_EA, 0} }, + { CPU_Any|CPU_64, MOD_GasSufW, 16, 0, 0, 1, {0x87, 0, 0}, 0, 2, + {OPT_Areg|OPS_16|OPA_EA, OPT_Areg|OPS_16|OPA_Spare, 0} }, { CPU_Any, MOD_GasSufW, 16, 0, 0, 1, {0x90, 0, 0}, 0, 2, {OPT_Areg|OPS_16|OPA_None, OPT_Reg|OPS_16|OPA_Op0Add, 0} }, { CPU_Any, MOD_GasSufW, 16, 0, 0, 1, {0x90, 0, 0}, 0, 2, @@ -740,6 +742,8 @@ static const x86_insn_info xchg_insn[] = { {OPT_RM|OPS_16|OPS_Relaxed|OPA_EA, OPT_Reg|OPS_16|OPA_Spare, 0} }, { CPU_Any, MOD_GasSufW, 16, 0, 0, 1, {0x87, 0, 0}, 0, 2, {OPT_Reg|OPS_16|OPA_Spare, OPT_RM|OPS_16|OPS_Relaxed|OPA_EA, 0} }, + { CPU_386|CPU_64, MOD_GasSufL, 32, 0, 0, 1, {0x87, 0, 0}, 0, 2, + {OPT_Areg|OPS_32|OPA_EA, OPT_Areg|OPS_32|OPA_Spare, 0} }, { CPU_386, MOD_GasSufL, 32, 0, 0, 1, {0x90, 0, 0}, 0, 2, {OPT_Areg|OPS_32|OPA_None, OPT_Reg|OPS_32|OPA_Op0Add, 0} }, { CPU_386, MOD_GasSufL, 32, 0, 0, 1, {0x90, 0, 0}, 0, 2, -- 2.40.0