From b1af2037a133a28a7d69bb1746fba8acc4e18196 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Sun, 27 Jan 2019 20:52:34 +0000 Subject: [PATCH] [X86][SSE] Add UNDEF test case for combineSelect ISD::USUBSAT matching (PR40083) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352329 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/psubus.ll | 45 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/test/CodeGen/X86/psubus.ll b/test/CodeGen/X86/psubus.ll index 13415e837db..a0d25ae0417 100644 --- a/test/CodeGen/X86/psubus.ll +++ b/test/CodeGen/X86/psubus.ll @@ -2747,3 +2747,48 @@ entry: %4 = extractelement <2 x i64> %3, i32 0 ret i64 %4 } + +; PR40083 +define i64 @test31(<2 x i64> %x) { +; SSE-LABEL: test31: +; SSE: # %bb.0: +; SSE-NEXT: movdqa {{.*#+}} xmm1 = <70,70,70,70,70,70,70,70,u,u,u,u,u,u,u,u> +; SSE-NEXT: pminub %xmm0, %xmm1 +; SSE-NEXT: pcmpeqb %xmm0, %xmm1 +; SSE-NEXT: paddb {{.*}}(%rip), %xmm0 +; SSE-NEXT: pandn %xmm0, %xmm1 +; SSE-NEXT: movq %xmm1, %rax +; SSE-NEXT: retq +; +; AVX1-LABEL: test31: +; AVX1: # %bb.0: +; AVX1-NEXT: vpminub {{.*}}(%rip), %xmm0, %xmm1 +; AVX1-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm1 +; AVX1-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 +; AVX1-NEXT: vpandn %xmm0, %xmm1, %xmm0 +; AVX1-NEXT: vmovq %xmm0, %rax +; AVX1-NEXT: retq +; +; AVX2-LABEL: test31: +; AVX2: # %bb.0: +; AVX2-NEXT: vpminub {{.*}}(%rip), %xmm0, %xmm1 +; AVX2-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm1 +; AVX2-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 +; AVX2-NEXT: vpandn %xmm0, %xmm1, %xmm0 +; AVX2-NEXT: vmovq %xmm0, %rax +; AVX2-NEXT: retq +; +; AVX512-LABEL: test31: +; AVX512: # %bb.0: +; AVX512-NEXT: vpcmpnleub {{.*}}(%rip), %xmm0, %k1 +; AVX512-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 {%k1} {z} +; AVX512-NEXT: vmovq %xmm0, %rax +; AVX512-NEXT: retq + %t0 = bitcast <2 x i64> %x to <16 x i8> + %cmp = icmp ugt <16 x i8> %t0, + %bop = add <16 x i8> %t0, + %sel = select <16 x i1> %cmp, <16 x i8> %bop, <16 x i8> zeroinitializer + %bc = bitcast <16 x i8> %sel to <2 x i64> + %ext = extractelement <2 x i64> %bc, i32 0 + ret i64 %ext +} -- 2.50.1