From b15ca8072a19e07b049ccf2aa114f27d550d532f Mon Sep 17 00:00:00 2001
From: Amara Emerson <aemerson@apple.com>
Date: Thu, 20 Dec 2018 03:27:42 +0000
Subject: [PATCH] Fix build errors introduced by r349712 on aarch64 bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349723 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/AArch64/AArch64InstructionSelector.cpp      |  3 +--
 .../CodeGen/AArch64/GlobalISel/select-scalar-merge.mir | 10 +++++-----
 2 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/lib/Target/AArch64/AArch64InstructionSelector.cpp b/lib/Target/AArch64/AArch64InstructionSelector.cpp
index cbb2e5c39d3..5eb589bf66d 100644
--- a/lib/Target/AArch64/AArch64InstructionSelector.cpp
+++ b/lib/Target/AArch64/AArch64InstructionSelector.cpp
@@ -1625,10 +1625,9 @@ bool AArch64InstructionSelector::selectMergeValues(
                                 .addImm(0)
                                 .addUse(I.getOperand(2).getReg())
                                 .addImm(AArch64::sub_32);
-  unsigned BFMDef = MRI.createVirtualRegister(DstRC);
   MachineInstr &BFM =
       *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(AArch64::BFMXri))
-           .addDef(BFMDef)
+           .addDef(I.getOperand(0).getReg())
            .addUse(SubToRegDef)
            .addUse(SubToRegDef2)
            .addImm(32)
diff --git a/test/CodeGen/AArch64/GlobalISel/select-scalar-merge.mir b/test/CodeGen/AArch64/GlobalISel/select-scalar-merge.mir
index 292e5fe119c..dafeee4d981 100644
--- a/test/CodeGen/AArch64/GlobalISel/select-scalar-merge.mir
+++ b/test/CodeGen/AArch64/GlobalISel/select-scalar-merge.mir
@@ -21,12 +21,12 @@ body:             |
     liveins: $w0, $w1
 
     ; CHECK-LABEL: name: gmerge_s64_s32
-    ; CHECK: [[COPY:%[0-9]+]]:gpr32all(s32) = COPY $w0
-    ; CHECK: [[COPY1:%[0-9]+]]:gpr32all(s32) = COPY $w1
-    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY]](s32), %subreg.sub_32
-    ; CHECK: [[SUBREG_TO_REG1:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY1]](s32), %subreg.sub_32
+    ; CHECK: [[COPY:%[0-9]+]]:gpr32all = COPY $w0
+    ; CHECK: [[COPY1:%[0-9]+]]:gpr32all = COPY $w1
+    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY]], %subreg.sub_32
+    ; CHECK: [[SUBREG_TO_REG1:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_32
     ; CHECK: [[BFMXri:%[0-9]+]]:gpr64 = BFMXri [[SUBREG_TO_REG]], [[SUBREG_TO_REG1]], 32, 31
-    ; CHECK: $x0 = COPY %2:gpr(s64)
+    ; CHECK: $x0 = COPY [[BFMXri]]
     %0(s32) = COPY $w0
     %1(s32) = COPY $w1
     %2(s64) = G_MERGE_VALUES %0(s32), %1(s32)
-- 
2.50.1