From b154949fbddce2a209de31ce9d8e48e763af3819 Mon Sep 17 00:00:00 2001 From: Nikita Popov Date: Sat, 25 May 2019 15:06:54 +0000 Subject: [PATCH] [X86] Add tests for min/maxnum with const operand; NFC git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361700 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/fmaxnum.ll | 68 +++++++++++++++++++++++++++++++++++++ test/CodeGen/X86/fminnum.ll | 68 +++++++++++++++++++++++++++++++++++++ 2 files changed, 136 insertions(+) diff --git a/test/CodeGen/X86/fmaxnum.ll b/test/CodeGen/X86/fmaxnum.ll index 91ca96e35ea..cfe77f47db0 100644 --- a/test/CodeGen/X86/fmaxnum.ll +++ b/test/CodeGen/X86/fmaxnum.ll @@ -469,5 +469,73 @@ define <2 x double> @maxnum_intrinsic_nnan_attr_f64(<2 x double> %a, <2 x double ret <2 x double> %r } +define float @test_maxnum_const_op1(float %x) { +; SSE-LABEL: test_maxnum_const_op1: +; SSE: # %bb.0: +; SSE-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero +; SSE-NEXT: movaps %xmm0, %xmm1 +; SSE-NEXT: cmpunordss %xmm0, %xmm1 +; SSE-NEXT: movaps %xmm1, %xmm3 +; SSE-NEXT: andps %xmm2, %xmm3 +; SSE-NEXT: maxss %xmm0, %xmm2 +; SSE-NEXT: andnps %xmm2, %xmm1 +; SSE-NEXT: orps %xmm3, %xmm1 +; SSE-NEXT: movaps %xmm1, %xmm0 +; SSE-NEXT: retq +; +; AVX1-LABEL: test_maxnum_const_op1: +; AVX1: # %bb.0: +; AVX1-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; AVX1-NEXT: vmaxss %xmm0, %xmm1, %xmm2 +; AVX1-NEXT: vcmpunordss %xmm0, %xmm0, %xmm0 +; AVX1-NEXT: vblendvps %xmm0, %xmm1, %xmm2, %xmm0 +; AVX1-NEXT: retq +; +; AVX512-LABEL: test_maxnum_const_op1: +; AVX512: # %bb.0: +; AVX512-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero +; AVX512-NEXT: vmaxss %xmm0, %xmm2, %xmm1 +; AVX512-NEXT: vcmpunordss %xmm0, %xmm0, %k1 +; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm1 {%k1} +; AVX512-NEXT: vmovaps %xmm1, %xmm0 +; AVX512-NEXT: retq + %r = call float @llvm.maxnum.f32(float 1.0, float %x) + ret float %r +} + +define float @test_maxnum_const_op2(float %x) { +; SSE-LABEL: test_maxnum_const_op2: +; SSE: # %bb.0: +; SSE-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero +; SSE-NEXT: movaps %xmm0, %xmm1 +; SSE-NEXT: cmpunordss %xmm0, %xmm1 +; SSE-NEXT: movaps %xmm1, %xmm3 +; SSE-NEXT: andps %xmm2, %xmm3 +; SSE-NEXT: maxss %xmm0, %xmm2 +; SSE-NEXT: andnps %xmm2, %xmm1 +; SSE-NEXT: orps %xmm3, %xmm1 +; SSE-NEXT: movaps %xmm1, %xmm0 +; SSE-NEXT: retq +; +; AVX1-LABEL: test_maxnum_const_op2: +; AVX1: # %bb.0: +; AVX1-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; AVX1-NEXT: vmaxss %xmm0, %xmm1, %xmm2 +; AVX1-NEXT: vcmpunordss %xmm0, %xmm0, %xmm0 +; AVX1-NEXT: vblendvps %xmm0, %xmm1, %xmm2, %xmm0 +; AVX1-NEXT: retq +; +; AVX512-LABEL: test_maxnum_const_op2: +; AVX512: # %bb.0: +; AVX512-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero +; AVX512-NEXT: vmaxss %xmm0, %xmm2, %xmm1 +; AVX512-NEXT: vcmpunordss %xmm0, %xmm0, %k1 +; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm1 {%k1} +; AVX512-NEXT: vmovaps %xmm1, %xmm0 +; AVX512-NEXT: retq + %r = call float @llvm.maxnum.f32(float %x, float 1.0) + ret float %r +} + attributes #0 = { "no-nans-fp-math"="true" } diff --git a/test/CodeGen/X86/fminnum.ll b/test/CodeGen/X86/fminnum.ll index 8faddb4662f..bbf48deeebc 100644 --- a/test/CodeGen/X86/fminnum.ll +++ b/test/CodeGen/X86/fminnum.ll @@ -469,5 +469,73 @@ define <4 x float> @minnum_intrinsic_nnan_attr_v4f32(<4 x float> %a, <4 x float> ret <4 x float> %r } +define float @test_minnum_const_op1(float %x) { +; SSE-LABEL: test_minnum_const_op1: +; SSE: # %bb.0: +; SSE-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero +; SSE-NEXT: movaps %xmm0, %xmm1 +; SSE-NEXT: cmpunordss %xmm0, %xmm1 +; SSE-NEXT: movaps %xmm1, %xmm3 +; SSE-NEXT: andps %xmm2, %xmm3 +; SSE-NEXT: minss %xmm0, %xmm2 +; SSE-NEXT: andnps %xmm2, %xmm1 +; SSE-NEXT: orps %xmm3, %xmm1 +; SSE-NEXT: movaps %xmm1, %xmm0 +; SSE-NEXT: retq +; +; AVX1-LABEL: test_minnum_const_op1: +; AVX1: # %bb.0: +; AVX1-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; AVX1-NEXT: vminss %xmm0, %xmm1, %xmm2 +; AVX1-NEXT: vcmpunordss %xmm0, %xmm0, %xmm0 +; AVX1-NEXT: vblendvps %xmm0, %xmm1, %xmm2, %xmm0 +; AVX1-NEXT: retq +; +; AVX512-LABEL: test_minnum_const_op1: +; AVX512: # %bb.0: +; AVX512-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero +; AVX512-NEXT: vminss %xmm0, %xmm2, %xmm1 +; AVX512-NEXT: vcmpunordss %xmm0, %xmm0, %k1 +; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm1 {%k1} +; AVX512-NEXT: vmovaps %xmm1, %xmm0 +; AVX512-NEXT: retq + %r = call float @llvm.minnum.f32(float 1.0, float %x) + ret float %r +} + +define float @test_minnum_const_op2(float %x) { +; SSE-LABEL: test_minnum_const_op2: +; SSE: # %bb.0: +; SSE-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero +; SSE-NEXT: movaps %xmm0, %xmm1 +; SSE-NEXT: cmpunordss %xmm0, %xmm1 +; SSE-NEXT: movaps %xmm1, %xmm3 +; SSE-NEXT: andps %xmm2, %xmm3 +; SSE-NEXT: minss %xmm0, %xmm2 +; SSE-NEXT: andnps %xmm2, %xmm1 +; SSE-NEXT: orps %xmm3, %xmm1 +; SSE-NEXT: movaps %xmm1, %xmm0 +; SSE-NEXT: retq +; +; AVX1-LABEL: test_minnum_const_op2: +; AVX1: # %bb.0: +; AVX1-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; AVX1-NEXT: vminss %xmm0, %xmm1, %xmm2 +; AVX1-NEXT: vcmpunordss %xmm0, %xmm0, %xmm0 +; AVX1-NEXT: vblendvps %xmm0, %xmm1, %xmm2, %xmm0 +; AVX1-NEXT: retq +; +; AVX512-LABEL: test_minnum_const_op2: +; AVX512: # %bb.0: +; AVX512-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero +; AVX512-NEXT: vminss %xmm0, %xmm2, %xmm1 +; AVX512-NEXT: vcmpunordss %xmm0, %xmm0, %k1 +; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm1 {%k1} +; AVX512-NEXT: vmovaps %xmm1, %xmm0 +; AVX512-NEXT: retq + %r = call float @llvm.minnum.f32(float %x, float 1.0) + ret float %r +} + attributes #0 = { "no-nans-fp-math"="true" } -- 2.50.1