From b0ee1d2cfb51de714e004ca8f68187d847590df5 Mon Sep 17 00:00:00 2001 From: Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> Date: Mon, 12 Aug 2019 22:32:21 +0000 Subject: [PATCH] [AMDGPU] Use PredicateControl in MIMGBaseOpcode. NFC. This is infrastructural, will be needed for future work. For some reason it was only used in MIMG_NoSampler, while needed everywere we use MIMGBaseOpcode if we want to use predicates. Differential Revision: https://reviews.llvm.org/D66115 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@368626 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AMDGPU/MIMGInstructions.td | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/Target/AMDGPU/MIMGInstructions.td b/lib/Target/AMDGPU/MIMGInstructions.td index 4735e6cb244..f33ad950d5d 100644 --- a/lib/Target/AMDGPU/MIMGInstructions.td +++ b/lib/Target/AMDGPU/MIMGInstructions.td @@ -26,7 +26,7 @@ def MIMGEncoding : GenericEnum { // Represent an ISA-level opcode, independent of the encoding and the // vdata/vaddr size. -class MIMGBaseOpcode { +class MIMGBaseOpcode : PredicateControl { MIMGBaseOpcode BaseOpcode = !cast<MIMGBaseOpcode>(NAME); bit Store = 0; bit Atomic = 0; @@ -291,7 +291,7 @@ multiclass MIMG_NoSampler_Src_Helper <bits<8> op, string asm, multiclass MIMG_NoSampler <bits<8> op, string asm, bit has_d16, bit mip = 0, bit isResInfo = 0> { - def "" : MIMGBaseOpcode, PredicateControl { + def "" : MIMGBaseOpcode { let Coordinates = !if(isResInfo, 0, 1); let LodOrClampOrMip = mip; let HasD16 = has_d16; -- 2.40.0