From afeb7897d509307e495bbfdee6df7bf024a56256 Mon Sep 17 00:00:00 2001 From: Philip Reames Date: Thu, 15 Aug 2019 22:21:14 +0000 Subject: [PATCH] [SDAG] Minor code cleanup/standardization of atomic accessors [NFC] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@369057 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/SelectionDAGNodes.h | 8 ++++++++ lib/Target/AArch64/AArch64InstructionSelector.cpp | 4 ++-- lib/Target/ARM/ARMInstructionSelector.cpp | 2 +- 3 files changed, 11 insertions(+), 3 deletions(-) diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index c88afe19712..62764004d77 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -1351,6 +1351,14 @@ public: /// store occurs. AtomicOrdering getOrdering() const { return MMO->getOrdering(); } + /// Return true if the memory operation ordering is Unordered or higher. + bool isAtomic() const { return MMO->isAtomic(); } + + /// Returns true if the memory operation doesn't imply any ordering + /// constraints on surrounding memory operations beyond the normal memory + /// aliasing rules. + bool isUnordered() const { return MMO->isUnordered(); } + /// Return the type of the in-memory value. EVT getMemoryVT() const { return MemoryVT; } diff --git a/lib/Target/AArch64/AArch64InstructionSelector.cpp b/lib/Target/AArch64/AArch64InstructionSelector.cpp index 88d522ea723..0c808bcb0a1 100644 --- a/lib/Target/AArch64/AArch64InstructionSelector.cpp +++ b/lib/Target/AArch64/AArch64InstructionSelector.cpp @@ -1237,7 +1237,7 @@ bool AArch64InstructionSelector::earlySelectLoad( // Don't handle atomic loads/stores yet. auto &MemOp = **I.memoperands_begin(); - if (MemOp.getOrdering() != AtomicOrdering::NotAtomic) { + if (MemOp.isAtomic()) { LLVM_DEBUG(dbgs() << "Atomic load/store not supported yet\n"); return false; } @@ -1739,7 +1739,7 @@ bool AArch64InstructionSelector::select(MachineInstr &I) { } auto &MemOp = **I.memoperands_begin(); - if (MemOp.getOrdering() != AtomicOrdering::NotAtomic) { + if (MemOp.isAtomic()) { // For now we just support s8 acquire loads to be able to compile stack // protector code. if (MemOp.getOrdering() == AtomicOrdering::Acquire && diff --git a/lib/Target/ARM/ARMInstructionSelector.cpp b/lib/Target/ARM/ARMInstructionSelector.cpp index 4696404047a..8e5e474c0f5 100644 --- a/lib/Target/ARM/ARMInstructionSelector.cpp +++ b/lib/Target/ARM/ARMInstructionSelector.cpp @@ -1076,7 +1076,7 @@ bool ARMInstructionSelector::select(MachineInstr &I) { case G_STORE: case G_LOAD: { const auto &MemOp = **I.memoperands_begin(); - if (MemOp.getOrdering() != AtomicOrdering::NotAtomic) { + if (MemOp.isAtomic()) { LLVM_DEBUG(dbgs() << "Atomic load/store not supported yet\n"); return false; } -- 2.40.0